Search

Ha Tran Nguyen

Examiner (ID: 1818)

Most Active Art Unit
2812
Art Unit(s)
2723, 2616, 2858, 2829, 2812, OPQA
Total Applications
630
Issued Applications
484
Pending Applications
26
Abandoned Applications
120

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1324403 [patent_doc_number] => 06602787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-05 [patent_title] => 'Method for fabricating semiconductor devices' [patent_app_type] => B2 [patent_app_number] => 09/879782 [patent_app_country] => US [patent_app_date] => 2001-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 15 [patent_no_of_words] => 4154 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602787.pdf [firstpage_image] =>[orig_patent_app_number] => 09879782 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/879782
Method for fabricating semiconductor devices Jun 11, 2001 Issued
Array ( [id] => 1458896 [patent_doc_number] => 06426293 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Minimizing resistance and electromigration of interconnect by adjusting anneal temperature and amount of seed layer dopant' [patent_app_type] => B1 [patent_app_number] => 09/872717 [patent_app_country] => US [patent_app_date] => 2001-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 8843 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 437 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/426/06426293.pdf [firstpage_image] =>[orig_patent_app_number] => 09872717 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/872717
Minimizing resistance and electromigration of interconnect by adjusting anneal temperature and amount of seed layer dopant May 31, 2001 Issued
Array ( [id] => 1207891 [patent_doc_number] => 06717639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Reflective liquid crystal display device' [patent_app_type] => B2 [patent_app_number] => 09/867023 [patent_app_country] => US [patent_app_date] => 2001-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3354 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717639.pdf [firstpage_image] =>[orig_patent_app_number] => 09867023 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/867023
Reflective liquid crystal display device May 29, 2001 Issued
Array ( [id] => 1364933 [patent_doc_number] => 06573603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-03 [patent_title] => 'Semiconductor device, and method of manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/865501 [patent_app_country] => US [patent_app_date] => 2001-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3595 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/573/06573603.pdf [firstpage_image] =>[orig_patent_app_number] => 09865501 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/865501
Semiconductor device, and method of manufacturing the same May 28, 2001 Issued
Array ( [id] => 1271011 [patent_doc_number] => 06648927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'Overlap vacuum formed plastic capacitor case' [patent_app_type] => B1 [patent_app_number] => 09/865975 [patent_app_country] => US [patent_app_date] => 2001-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2825 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/648/06648927.pdf [firstpage_image] =>[orig_patent_app_number] => 09865975 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/865975
Overlap vacuum formed plastic capacitor case May 24, 2001 Issued
Array ( [id] => 5951494 [patent_doc_number] => 20020006717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-17 [patent_title] => 'Method for manufacturing a semiconductor device' [patent_app_type] => new [patent_app_number] => 09/866421 [patent_app_country] => US [patent_app_date] => 2001-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7265 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20020006717.pdf [firstpage_image] =>[orig_patent_app_number] => 09866421 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/866421
Method for manufacturing a semiconductor device May 24, 2001 Issued
Array ( [id] => 1448198 [patent_doc_number] => 06454817 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Method for manufacturing solid electrolytic capacitor using functional polymer electrolytic composition' [patent_app_type] => B1 [patent_app_number] => 09/861705 [patent_app_country] => US [patent_app_date] => 2001-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3293 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/454/06454817.pdf [firstpage_image] =>[orig_patent_app_number] => 09861705 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/861705
Method for manufacturing solid electrolytic capacitor using functional polymer electrolytic composition May 21, 2001 Issued
Array ( [id] => 1545370 [patent_doc_number] => 06444566 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Method of making borderless contact having a sion buffer layer' [patent_app_type] => B1 [patent_app_number] => 09/845481 [patent_app_country] => US [patent_app_date] => 2001-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1733 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/444/06444566.pdf [firstpage_image] =>[orig_patent_app_number] => 09845481 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/845481
Method of making borderless contact having a sion buffer layer Apr 29, 2001 Issued
Array ( [id] => 6896829 [patent_doc_number] => 20010044994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-29 [patent_title] => 'Capacitor termination assembly' [patent_app_type] => new [patent_app_number] => 09/843109 [patent_app_country] => US [patent_app_date] => 2001-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2007 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20010044994.pdf [firstpage_image] =>[orig_patent_app_number] => 09843109 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/843109
Capacitor termination assembly Apr 24, 2001 Issued
Array ( [id] => 1418366 [patent_doc_number] => 06514844 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-04 [patent_title] => 'Sidewall treatment for low dielectric constant (low K) materials by ion implantation' [patent_app_type] => B1 [patent_app_number] => 09/840598 [patent_app_country] => US [patent_app_date] => 2001-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6429 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/514/06514844.pdf [firstpage_image] =>[orig_patent_app_number] => 09840598 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840598
Sidewall treatment for low dielectric constant (low K) materials by ion implantation Apr 22, 2001 Issued
Array ( [id] => 1324297 [patent_doc_number] => 06602773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-05 [patent_title] => 'Methods of fabricating semiconductor devices having protected plug contacts and upper interconnections' [patent_app_type] => B2 [patent_app_number] => 09/840741 [patent_app_country] => US [patent_app_date] => 2001-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4155 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602773.pdf [firstpage_image] =>[orig_patent_app_number] => 09840741 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/840741
Methods of fabricating semiconductor devices having protected plug contacts and upper interconnections Apr 22, 2001 Issued
Array ( [id] => 1014619 [patent_doc_number] => 06893961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Methods for making metallization structures for semiconductor device interconnects' [patent_app_type] => utility [patent_app_number] => 09/829161 [patent_app_country] => US [patent_app_date] => 2001-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5099 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/893/06893961.pdf [firstpage_image] =>[orig_patent_app_number] => 09829161 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/829161
Methods for making metallization structures for semiconductor device interconnects Apr 8, 2001 Issued
09/828371 Sequential station tool for wet processing of semiconductor wafers Apr 4, 2001 Pending
Array ( [id] => 1467045 [patent_doc_number] => 06458691 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'Dual inlaid process using an imaging layer to protect via from poisoning' [patent_app_type] => B1 [patent_app_number] => 09/824662 [patent_app_country] => US [patent_app_date] => 2001-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 32 [patent_no_of_words] => 5884 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/458/06458691.pdf [firstpage_image] =>[orig_patent_app_number] => 09824662 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/824662
Dual inlaid process using an imaging layer to protect via from poisoning Apr 3, 2001 Issued
Array ( [id] => 1509322 [patent_doc_number] => 06441433 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Method of making a multi-thickness silicide SOI device' [patent_app_type] => B1 [patent_app_number] => 09/824412 [patent_app_country] => US [patent_app_date] => 2001-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4668 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/441/06441433.pdf [firstpage_image] =>[orig_patent_app_number] => 09824412 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/824412
Method of making a multi-thickness silicide SOI device Apr 1, 2001 Issued
Array ( [id] => 1448080 [patent_doc_number] => 06369430 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Method of preventing two neighboring contacts from a short-circuit caused by a void between them and device having the same' [patent_app_type] => B1 [patent_app_number] => 09/823310 [patent_app_country] => US [patent_app_date] => 2001-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2460 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/369/06369430.pdf [firstpage_image] =>[orig_patent_app_number] => 09823310 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/823310
Method of preventing two neighboring contacts from a short-circuit caused by a void between them and device having the same Apr 1, 2001 Issued
Array ( [id] => 1475985 [patent_doc_number] => 06451074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-09-17 [patent_title] => 'Method for making conductive polymer capacitor' [patent_app_type] => B2 [patent_app_number] => 09/824287 [patent_app_country] => US [patent_app_date] => 2001-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1748 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/451/06451074.pdf [firstpage_image] =>[orig_patent_app_number] => 09824287 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/824287
Method for making conductive polymer capacitor Apr 1, 2001 Issued
Array ( [id] => 1578292 [patent_doc_number] => 06448177 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Method of making a semiconductor device having a dual damascene interconnect spaced from a support structure' [patent_app_type] => B1 [patent_app_number] => 09/819881 [patent_app_country] => US [patent_app_date] => 2001-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 25 [patent_no_of_words] => 6350 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448177.pdf [firstpage_image] =>[orig_patent_app_number] => 09819881 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/819881
Method of making a semiconductor device having a dual damascene interconnect spaced from a support structure Mar 26, 2001 Issued
Array ( [id] => 7647021 [patent_doc_number] => 06476497 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Concentric metal density power routing' [patent_app_type] => B1 [patent_app_number] => 09/817642 [patent_app_country] => US [patent_app_date] => 2001-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2898 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/476/06476497.pdf [firstpage_image] =>[orig_patent_app_number] => 09817642 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/817642
Concentric metal density power routing Mar 25, 2001 Issued
Array ( [id] => 6207057 [patent_doc_number] => 20020071236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Electrode for electrolytic capacitor and process of producing the same' [patent_app_type] => new [patent_app_number] => 09/816224 [patent_app_country] => US [patent_app_date] => 2001-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7941 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20020071236.pdf [firstpage_image] =>[orig_patent_app_number] => 09816224 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/816224
Electrode for electrolytic capacitor and process of producing the same Mar 25, 2001 Issued
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