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Ha Tran Nguyen

Examiner (ID: 6029)

Most Active Art Unit
2812
Art Unit(s)
OPQA, 2723, 2812, 2858, 2829, 2616
Total Applications
630
Issued Applications
484
Pending Applications
26
Abandoned Applications
120

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2891829 [patent_doc_number] => 05119481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Register bus multiprocessor system with shift' [patent_app_type] => 1 [patent_app_number] => 7/696291 [patent_app_country] => US [patent_app_date] => 1991-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 5750 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119481.pdf [firstpage_image] =>[orig_patent_app_number] => 696291 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/696291
Register bus multiprocessor system with shift Apr 25, 1991 Issued
Array ( [id] => 2883035 [patent_doc_number] => 05163150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-10 [patent_title] => 'Information processor performing interrupt operation without saving contents of program counter' [patent_app_type] => 1 [patent_app_number] => 7/691297 [patent_app_country] => US [patent_app_date] => 1991-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 17893 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/163/05163150.pdf [firstpage_image] =>[orig_patent_app_number] => 691297 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/691297
Information processor performing interrupt operation without saving contents of program counter Apr 24, 1991 Issued
Array ( [id] => 2889912 [patent_doc_number] => 05159688 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-27 [patent_title] => 'Information processor performing interrupt operation in two modes' [patent_app_type] => 1 [patent_app_number] => 7/691284 [patent_app_country] => US [patent_app_date] => 1991-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 17892 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/159/05159688.pdf [firstpage_image] =>[orig_patent_app_number] => 691284 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/691284
Information processor performing interrupt operation in two modes Apr 24, 1991 Issued
07/687945 DATA PROCESSING MACHINE Apr 18, 1991 Abandoned
Array ( [id] => 3065055 [patent_doc_number] => 05325525 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-28 [patent_title] => 'Method of automatically controlling the allocation of resources of a parallel processor computer system by calculating a minimum execution time of a task and scheduling subtasks against resources to execute the task in the minimum time' [patent_app_type] => 1 [patent_app_number] => 7/680223 [patent_app_country] => US [patent_app_date] => 1991-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 14085 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/325/05325525.pdf [firstpage_image] =>[orig_patent_app_number] => 680223 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/680223
Method of automatically controlling the allocation of resources of a parallel processor computer system by calculating a minimum execution time of a task and scheduling subtasks against resources to execute the task in the minimum time Apr 3, 1991 Issued
Array ( [id] => 2976708 [patent_doc_number] => 05274777 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-28 [patent_title] => 'Digital data processor executing a conditional instruction within a single machine cycle' [patent_app_type] => 1 [patent_app_number] => 7/676692 [patent_app_country] => US [patent_app_date] => 1991-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2902 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/274/05274777.pdf [firstpage_image] =>[orig_patent_app_number] => 676692 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/676692
Digital data processor executing a conditional instruction within a single machine cycle Mar 28, 1991 Issued
Array ( [id] => 2688720 [patent_doc_number] => 05067077 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-19 [patent_title] => 'Single chip microcomputer having unauthorized memory space access protection' [patent_app_type] => 1 [patent_app_number] => 7/671660 [patent_app_country] => US [patent_app_date] => 1991-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3051 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/067/05067077.pdf [firstpage_image] =>[orig_patent_app_number] => 671660 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/671660
Single chip microcomputer having unauthorized memory space access protection Mar 18, 1991 Issued
Array ( [id] => 2889871 [patent_doc_number] => 05159686 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-27 [patent_title] => 'Multi-processor computer system having process-independent communication register addressing' [patent_app_type] => 1 [patent_app_number] => 7/666038 [patent_app_country] => US [patent_app_date] => 1991-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6352 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 371 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/159/05159686.pdf [firstpage_image] =>[orig_patent_app_number] => 666038 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/666038
Multi-processor computer system having process-independent communication register addressing Mar 6, 1991 Issued
Array ( [id] => 3042302 [patent_doc_number] => 05317740 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-31 [patent_title] => 'Alternate and iterative analysis of computer programs for locating translatable code by resolving callbacks and other conflicting mutual dependencies' [patent_app_type] => 1 [patent_app_number] => 7/666223 [patent_app_country] => US [patent_app_date] => 1991-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 33 [patent_no_of_words] => 33160 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 641 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/317/05317740.pdf [firstpage_image] =>[orig_patent_app_number] => 666223 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/666223
Alternate and iterative analysis of computer programs for locating translatable code by resolving callbacks and other conflicting mutual dependencies Mar 6, 1991 Issued
Array ( [id] => 3676864 [patent_doc_number] => 05598560 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-28 [patent_title] => 'Tracking condition codes in translation code for different machine architectures' [patent_app_type] => 1 [patent_app_number] => 7/666082 [patent_app_country] => US [patent_app_date] => 1991-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 12337 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/598/05598560.pdf [firstpage_image] =>[orig_patent_app_number] => 666082 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/666082
Tracking condition codes in translation code for different machine architectures Mar 6, 1991 Issued
Array ( [id] => 3094074 [patent_doc_number] => 05321838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-14 [patent_title] => 'Event capturing for computer software evaluation' [patent_app_type] => 1 [patent_app_number] => 7/662305 [patent_app_country] => US [patent_app_date] => 1991-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2593 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/321/05321838.pdf [firstpage_image] =>[orig_patent_app_number] => 662305 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/662305
Event capturing for computer software evaluation Feb 27, 1991 Issued
07/661890 RECORD RETRIEVAL METHOD USING KEY BOUNDARY VALUE TABLE AND CONDITION VALID ATATUS TABLE Feb 26, 1991 Abandoned
Array ( [id] => 2702895 [patent_doc_number] => 05065308 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-12 [patent_title] => 'Processing cell for fault tolerant arrays' [patent_app_type] => 1 [patent_app_number] => 7/659538 [patent_app_country] => US [patent_app_date] => 1991-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8306 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/065/05065308.pdf [firstpage_image] =>[orig_patent_app_number] => 659538 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/659538
Processing cell for fault tolerant arrays Feb 21, 1991 Issued
Array ( [id] => 2676202 [patent_doc_number] => 05070446 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-03 [patent_title] => 'Method of simulating a hexagonal array of computer processors and/or memories' [patent_app_type] => 1 [patent_app_number] => 7/654410 [patent_app_country] => US [patent_app_date] => 1991-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2651 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/070/05070446.pdf [firstpage_image] =>[orig_patent_app_number] => 654410 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/654410
Method of simulating a hexagonal array of computer processors and/or memories Feb 7, 1991 Issued
07/644945 METHOD FOR STORING RELATIONSHIPS IN OBJECT-ORIENTED COMPUTING SYSTEMS Jan 22, 1991 Abandoned
07/630727 MICROPROCESSOR Dec 19, 1990 Abandoned
Array ( [id] => 2691092 [patent_doc_number] => 05045995 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-03 [patent_title] => 'Selective operation of processing elements in a single instruction multiple data stream (SIMD) computer system' [patent_app_type] => 1 [patent_app_number] => 7/622229 [patent_app_country] => US [patent_app_date] => 1990-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3723 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/045/05045995.pdf [firstpage_image] =>[orig_patent_app_number] => 622229 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/622229
Selective operation of processing elements in a single instruction multiple data stream (SIMD) computer system Dec 2, 1990 Issued
07/620508 CONSISTENT PACKET SWITCHED MEMORY BUS FOR SHARED MEMORY MULTIPROCESSORS Nov 29, 1990 Abandoned
07/612666 SYSTEM FOR EXAMINING STATUSES OF TASKS WHEN ONE TASK IS INTERRUPTED IN DATA PROCESSING SYSTEM Nov 13, 1990 Abandoned
07/608013 WORD PROCESSOR Oct 31, 1990 Abandoned
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