Search

Ha Tran Nguyen

Examiner (ID: 1818)

Most Active Art Unit
2812
Art Unit(s)
2723, 2616, 2858, 2829, 2812, OPQA
Total Applications
630
Issued Applications
484
Pending Applications
26
Abandoned Applications
120

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7629791 [patent_doc_number] => 06818565 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-16 [patent_title] => 'Gate insulator pre-clean procedure' [patent_app_type] => B1 [patent_app_number] => 10/253270 [patent_app_country] => US [patent_app_date] => 2002-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2085 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/818/06818565.pdf [firstpage_image] =>[orig_patent_app_number] => 10253270 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/253270
Gate insulator pre-clean procedure Sep 23, 2002 Issued
Array ( [id] => 7629804 [patent_doc_number] => 06818552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-16 [patent_title] => 'Method for eliminating reaction between photoresist and OSG' [patent_app_type] => B2 [patent_app_number] => 10/243528 [patent_app_country] => US [patent_app_date] => 2002-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 88 [patent_no_of_words] => 12471 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 10 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/818/06818552.pdf [firstpage_image] =>[orig_patent_app_number] => 10243528 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/243528
Method for eliminating reaction between photoresist and OSG Sep 12, 2002 Issued
Array ( [id] => 6792190 [patent_doc_number] => 20030087534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Surface modification for barrier to ionic penetration' [patent_app_type] => new [patent_app_number] => 10/241801 [patent_app_country] => US [patent_app_date] => 2002-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4664 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20030087534.pdf [firstpage_image] =>[orig_patent_app_number] => 10241801 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/241801
Surface modification for barrier to ionic penetration Sep 9, 2002 Abandoned
Array ( [id] => 1342302 [patent_doc_number] => 06579327 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Cylindrical high voltage supercapacitor and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 10/236998 [patent_app_country] => US [patent_app_date] => 2002-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3930 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/579/06579327.pdf [firstpage_image] =>[orig_patent_app_number] => 10236998 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/236998
Cylindrical high voltage supercapacitor and method of manufacturing the same Sep 5, 2002 Issued
Array ( [id] => 6696938 [patent_doc_number] => 20030109132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Method for forming dual damascene structure in semiconductor device' [patent_app_type] => new [patent_app_number] => 10/233812 [patent_app_country] => US [patent_app_date] => 2002-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4817 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20030109132.pdf [firstpage_image] =>[orig_patent_app_number] => 10233812 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/233812
Method for forming dual damascene structure in semiconductor device Sep 2, 2002 Issued
Array ( [id] => 1085251 [patent_doc_number] => 06830594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-14 [patent_title] => 'Process for producing an electric double layer capacitor and positive electrode for an electric double layer capacitor' [patent_app_type] => B2 [patent_app_number] => 10/226135 [patent_app_country] => US [patent_app_date] => 2002-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3917 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/830/06830594.pdf [firstpage_image] =>[orig_patent_app_number] => 10226135 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/226135
Process for producing an electric double layer capacitor and positive electrode for an electric double layer capacitor Aug 22, 2002 Issued
Array ( [id] => 1315651 [patent_doc_number] => 06607993 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Method using ultraviolet radiation for integrated circuit manufacturing' [patent_app_type] => B1 [patent_app_number] => 10/224061 [patent_app_country] => US [patent_app_date] => 2002-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2401 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/607/06607993.pdf [firstpage_image] =>[orig_patent_app_number] => 10224061 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/224061
Method using ultraviolet radiation for integrated circuit manufacturing Aug 18, 2002 Issued
Array ( [id] => 707734 [patent_doc_number] => 07060618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Semiconductor device, method for manufacturing the same, and plating solution' [patent_app_type] => utility [patent_app_number] => 10/216902 [patent_app_country] => US [patent_app_date] => 2002-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 73 [patent_no_of_words] => 24726 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/060/07060618.pdf [firstpage_image] =>[orig_patent_app_number] => 10216902 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/216902
Semiconductor device, method for manufacturing the same, and plating solution Aug 12, 2002 Issued
Array ( [id] => 6530864 [patent_doc_number] => 20020192943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'Borderless contact with buffer layer' [patent_app_type] => new [patent_app_number] => 10/213588 [patent_app_country] => US [patent_app_date] => 2002-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1765 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20020192943.pdf [firstpage_image] =>[orig_patent_app_number] => 10213588 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/213588
Borderless contact with buffer layer Aug 6, 2002 Issued
Array ( [id] => 1027897 [patent_doc_number] => 06881612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-19 [patent_title] => 'Method of bonding a semiconductor element to a substrate' [patent_app_type] => utility [patent_app_number] => 10/212101 [patent_app_country] => US [patent_app_date] => 2002-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5213 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/881/06881612.pdf [firstpage_image] =>[orig_patent_app_number] => 10212101 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/212101
Method of bonding a semiconductor element to a substrate Aug 5, 2002 Issued
Array ( [id] => 1281230 [patent_doc_number] => 06642153 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Method for avoiding unetched polymer residue in anisotropically etched semiconductor features' [patent_app_type] => B1 [patent_app_number] => 10/209072 [patent_app_country] => US [patent_app_date] => 2002-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 3559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642153.pdf [firstpage_image] =>[orig_patent_app_number] => 10209072 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/209072
Method for avoiding unetched polymer residue in anisotropically etched semiconductor features Jul 30, 2002 Issued
Array ( [id] => 1274075 [patent_doc_number] => 06649521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-18 [patent_title] => 'Method for determining the relevant ion and particle flows in i-PVD processes' [patent_app_type] => B2 [patent_app_number] => 10/208415 [patent_app_country] => US [patent_app_date] => 2002-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2697 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/649/06649521.pdf [firstpage_image] =>[orig_patent_app_number] => 10208415 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/208415
Method for determining the relevant ion and particle flows in i-PVD processes Jul 28, 2002 Issued
Array ( [id] => 1281499 [patent_doc_number] => 06646351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-11 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => B2 [patent_app_number] => 10/201892 [patent_app_country] => US [patent_app_date] => 2002-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 4413 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/646/06646351.pdf [firstpage_image] =>[orig_patent_app_number] => 10201892 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/201892
Semiconductor device and manufacturing method thereof Jul 24, 2002 Issued
Array ( [id] => 7398976 [patent_doc_number] => 20040018715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Method of cleaning a surface of a material layer' [patent_app_type] => new [patent_app_number] => 10/205762 [patent_app_country] => US [patent_app_date] => 2002-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4985 [patent_no_of_claims] => 104 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20040018715.pdf [firstpage_image] =>[orig_patent_app_number] => 10205762 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/205762
Method of cleaning a surface of a material layer Jul 24, 2002 Abandoned
Array ( [id] => 1340189 [patent_doc_number] => 06589878 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'Method of cleaning a wafer in an IC fabrication' [patent_app_type] => B1 [patent_app_number] => 10/202950 [patent_app_country] => US [patent_app_date] => 2002-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7680 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/589/06589878.pdf [firstpage_image] =>[orig_patent_app_number] => 10202950 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/202950
Method of cleaning a wafer in an IC fabrication Jul 23, 2002 Issued
Array ( [id] => 1146063 [patent_doc_number] => 06773955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'Low profile multi-IC chip package connector' [patent_app_type] => B2 [patent_app_number] => 10/200792 [patent_app_country] => US [patent_app_date] => 2002-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5477 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/773/06773955.pdf [firstpage_image] =>[orig_patent_app_number] => 10200792 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/200792
Low profile multi-IC chip package connector Jul 21, 2002 Issued
Array ( [id] => 1058961 [patent_doc_number] => 06852137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-08 [patent_title] => 'Method for manufacturing solid electrolytic capacitor' [patent_app_type] => utility [patent_app_number] => 10/363132 [patent_app_country] => US [patent_app_date] => 2002-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 3751 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/852/06852137.pdf [firstpage_image] =>[orig_patent_app_number] => 10363132 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/363132
Method for manufacturing solid electrolytic capacitor Jul 15, 2002 Issued
Array ( [id] => 1299760 [patent_doc_number] => 06624059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-23 [patent_title] => 'Method of improving interconnect of semiconductor devices by utilizing a flattened ball bond' [patent_app_type] => B2 [patent_app_number] => 10/197271 [patent_app_country] => US [patent_app_date] => 2002-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3326 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/624/06624059.pdf [firstpage_image] =>[orig_patent_app_number] => 10197271 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/197271
Method of improving interconnect of semiconductor devices by utilizing a flattened ball bond Jul 14, 2002 Issued
Array ( [id] => 1134499 [patent_doc_number] => 06784104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-31 [patent_title] => 'Method for improved cu electroplating in integrated circuit fabrication' [patent_app_type] => B2 [patent_app_number] => 10/194592 [patent_app_country] => US [patent_app_date] => 2002-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1998 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/784/06784104.pdf [firstpage_image] =>[orig_patent_app_number] => 10194592 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/194592
Method for improved cu electroplating in integrated circuit fabrication Jul 11, 2002 Issued
Array ( [id] => 6714715 [patent_doc_number] => 20030026063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Electrochemical capacitor and methods of fabricating same' [patent_app_type] => new [patent_app_number] => 10/194925 [patent_app_country] => US [patent_app_date] => 2002-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10517 [patent_no_of_claims] => 84 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20030026063.pdf [firstpage_image] =>[orig_patent_app_number] => 10194925 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/194925
Electrochemical capacitor and methods of fabricating same Jul 10, 2002 Issued
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