Search

Habte Mered

Examiner (ID: 220, Phone: (571)272-6046 , Office: P/2474 )

Most Active Art Unit
2474
Art Unit(s)
2474, 2662, 2416, 2616
Total Applications
972
Issued Applications
735
Pending Applications
69
Abandoned Applications
179

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18907903 [patent_doc_number] => 20240023388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => DISPLAY PANEL AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/435073 [patent_app_country] => US [patent_app_date] => 2021-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6818 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17435073 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/435073
Display panel and electronic device having power supply wire in redundant pixel area electrically connected to light-emitting function layer Aug 10, 2021 Issued
Array ( [id] => 18528680 [patent_doc_number] => 11715683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Strip substrate having protection pattern between saw line patterns [patent_app_type] => utility [patent_app_number] => 17/395060 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 11152 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395060 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395060
Strip substrate having protection pattern between saw line patterns Aug 4, 2021 Issued
Array ( [id] => 20418383 [patent_doc_number] => 12501688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Cmos circuit having transmission circuit connected to output terminal of logical operation circuit [patent_app_type] => utility [patent_app_number] => 18/004559 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2442 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18004559 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/004559
Cmos circuit having transmission circuit connected to output terminal of logical operation circuit Aug 4, 2021 Issued
Array ( [id] => 19873711 [patent_doc_number] => 12266582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Hermetic package for high CTE mismatch [patent_app_type] => utility [patent_app_number] => 17/394083 [patent_app_country] => US [patent_app_date] => 2021-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 7025 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394083 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/394083
Hermetic package for high CTE mismatch Aug 3, 2021 Issued
Array ( [id] => 19314439 [patent_doc_number] => 12040265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => High-frequency ceramic packages with modified castellation and metal layer architectures [patent_app_type] => utility [patent_app_number] => 17/387794 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 34 [patent_no_of_words] => 4869 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387794 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387794
High-frequency ceramic packages with modified castellation and metal layer architectures Jul 27, 2021 Issued
Array ( [id] => 17347260 [patent_doc_number] => 20220013591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => DISPLAY DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/379007 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17379007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/379007
Display device having at least four overlapping display panels Jul 18, 2021 Issued
Array ( [id] => 19048347 [patent_doc_number] => 11937478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Multi-colored microcavity OLED array having DBR for high aperture display and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 17/378300 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 48 [patent_no_of_words] => 21007 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17378300 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/378300
Multi-colored microcavity OLED array having DBR for high aperture display and method of fabricating the same Jul 15, 2021 Issued
Array ( [id] => 17203769 [patent_doc_number] => 20210343864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/373869 [patent_app_country] => US [patent_app_date] => 2021-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4780 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 486 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17373869 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/373869
Semiconductor device having semiconductor switching element in sense cell region Jul 12, 2021 Issued
Array ( [id] => 18415972 [patent_doc_number] => 11670518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Method of manufacturing semiconductor package having connection structure with tapering connection via layers [patent_app_type] => utility [patent_app_number] => 17/368486 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 8815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368486 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368486
Method of manufacturing semiconductor package having connection structure with tapering connection via layers Jul 5, 2021 Issued
Array ( [id] => 17389396 [patent_doc_number] => 20220037248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => SEMICONDUCTOR PACKAGES [patent_app_type] => utility [patent_app_number] => 17/364558 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364558 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/364558
Semiconductor packages having first and second redistribution patterns Jun 29, 2021 Issued
Array ( [id] => 19046702 [patent_doc_number] => 11935822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Wiring substrate having metal post offset from conductor pad and method for manufacturing wiring substrate [patent_app_type] => utility [patent_app_number] => 17/359887 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5790 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17359887 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/359887
Wiring substrate having metal post offset from conductor pad and method for manufacturing wiring substrate Jun 27, 2021 Issued
Array ( [id] => 19305801 [patent_doc_number] => 20240234381 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => DRIVING SUBSTRATE, LIGHT-EMITTING APPARATUS AND MANUFACTURING METHOD THEREOF, AND SPLICING DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/769825 [patent_app_country] => US [patent_app_date] => 2021-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17769825 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/769825
Driving substrate, light-emitting apparatus and manufacturing method thereof, and splicing display apparatus each having driving substrate in bending area Jun 24, 2021 Issued
Array ( [id] => 19305801 [patent_doc_number] => 20240234381 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => DRIVING SUBSTRATE, LIGHT-EMITTING APPARATUS AND MANUFACTURING METHOD THEREOF, AND SPLICING DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/769825 [patent_app_country] => US [patent_app_date] => 2021-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17769825 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/769825
Driving substrate, light-emitting apparatus and manufacturing method thereof, and splicing display apparatus each having driving substrate in bending area Jun 24, 2021 Issued
Array ( [id] => 18761581 [patent_doc_number] => 11812635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Protection film having base layer over adhesive layer [patent_app_type] => utility [patent_app_number] => 17/357990 [patent_app_country] => US [patent_app_date] => 2021-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 11605 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17357990 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/357990
Protection film having base layer over adhesive layer Jun 24, 2021 Issued
Array ( [id] => 19842767 [patent_doc_number] => 12255167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Semiconductor packages with an intermetallic layer [patent_app_type] => utility [patent_app_number] => 17/304715 [patent_app_country] => US [patent_app_date] => 2021-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 23 [patent_no_of_words] => 7321 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17304715 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/304715
Semiconductor packages with an intermetallic layer Jun 23, 2021 Issued
Array ( [id] => 19178182 [patent_doc_number] => 20240164156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => Display Substrate, Preparation Method thereof, and Display Apparatus [patent_app_type] => utility [patent_app_number] => 17/780999 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17780999 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/780999
Display substrate having bezel region at periphery of first display region and second display region and preparation method thereof, and display apparatus having the same Jun 22, 2021 Issued
Array ( [id] => 18736915 [patent_doc_number] => 11805671 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Method for manufacturing display backplane, display backplane, and display device [patent_app_type] => utility [patent_app_number] => 17/356380 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4528 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356380 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/356380
Method for manufacturing display backplane, display backplane, and display device Jun 22, 2021 Issued
Array ( [id] => 17486181 [patent_doc_number] => 20220093685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/346478 [patent_app_country] => US [patent_app_date] => 2021-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10405 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17346478 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/346478
Semiconductor memory device having memory layer extending between insulation layer and semiconductor layer Jun 13, 2021 Issued
Array ( [id] => 19330439 [patent_doc_number] => 12048139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Manufacturing method of semiconductor structure using first mask layer and first photoresist layer to selectively etch stack on complete die region [patent_app_type] => utility [patent_app_number] => 17/438436 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 5241 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17438436 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/438436
Manufacturing method of semiconductor structure using first mask layer and first photoresist layer to selectively etch stack on complete die region Jun 10, 2021 Issued
Array ( [id] => 17303054 [patent_doc_number] => 20210398893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => QUANTUM DEVICE [patent_app_type] => utility [patent_app_number] => 17/345426 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13192 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345426 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/345426
Quantum device having quantum chip on interposer in contact with sample stage Jun 10, 2021 Issued
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