Habte Mered

Array ( [id] => 18193853 [patent_doc_number] => 20230047372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SEMICONDUCTOR LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 17/711165 [patent_app_country] => US [patent_app_date] => 2022-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5940 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17711165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18735641 [patent_doc_number] => 11804382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Method of forming package substrate with partially recessed capacitor [patent_app_type] => utility [patent_app_number] => 17/707872 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6526 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17707872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20612903 [patent_doc_number] => 12588524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Stacked via modulator in high speed interconnect [patent_app_type] => utility [patent_app_number] => 17/707342 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 1182 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17707342 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18321989 [patent_doc_number] => 20230120117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => Nanostructure Field-Effect Transistor Device and Method of Forming [patent_app_type] => utility [patent_app_number] => 17/705004 [patent_app_country] => US [patent_app_date] => 2022-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17705004 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18379913 [patent_doc_number] => 20230155002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => METAL GATE FIN ELECTRODE STRUCTURE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/700998 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17700998 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18796968 [patent_doc_number] => 11830803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Chip-on-film package having redistribution pattern between semiconductor chip and connection terminal [patent_app_type] => utility [patent_app_number] => 17/699525 [patent_app_country] => US [patent_app_date] => 2022-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 6682 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17699525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18439999 [patent_doc_number] => 20230187294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => SEMICONDUCTOR WAFER SEAL RING [patent_app_type] => utility [patent_app_number] => 17/699717 [patent_app_country] => US [patent_app_date] => 2022-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17699717 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20332839 [patent_doc_number] => 12463124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Component carrier with surface mounted components connected by high density connection region [patent_app_type] => utility [patent_app_number] => 17/655160 [patent_app_country] => US [patent_app_date] => 2022-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 7899 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17655160 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17871095 [patent_doc_number] => 20220293832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => LIGHT EMITTING MODULE, METHOD OF MANUFACTURING THE SAME, AND DISPLAY APPARATUS HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 17/692699 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16710 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17692699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17692299 [patent_doc_number] => 20220199592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => LIGHT-EMITTING DIODE PACKAGING MODULE [patent_app_type] => utility [patent_app_number] => 17/691638 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17691638 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17692221 [patent_doc_number] => 20220199514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => ELECTRONIC DEVICE HAVING INTEGRATED CIRCUIT CHIP CONNECTED TO PADS ON SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/691135 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17691135 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17692661 [patent_doc_number] => 20220199954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => DISPLAY DEVICE INCLUDING BENDING REGION INCLUDING LAMINATED FIRST AND SECOND RESIN LAYERS [patent_app_type] => utility [patent_app_number] => 17/689375 [patent_app_country] => US [patent_app_date] => 2022-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17689375 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18623813 [patent_doc_number] => 11756869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Semiconductor package having UBM pad with gap separating central portion from peripheral portion [patent_app_type] => utility [patent_app_number] => 17/675209 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 6903 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17675209 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19664372 [patent_doc_number] => 12178077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Display device having driving initialization transistors and diode initialization transistor [patent_app_type] => utility [patent_app_number] => 17/672381 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 6944 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17672381 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18446980 [patent_doc_number] => 11682556 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Methods of improving graphene deposition for processes using microwave surface-wave plasma on dielectric materials [patent_app_type] => utility [patent_app_number] => 17/672305 [patent_app_country] => US [patent_app_date] => 2022-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3547 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17672305 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17645288 [patent_doc_number] => 20220173027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => SYSTEMS, METHODS, AND APPARATUSES FOR IMPLEMENTING A PAD ON SOLDER MASK (POSM) SEMICONDUCTOR SUBSTRATE PACKAGE [patent_app_type] => utility [patent_app_number] => 17/671478 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10553 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671478 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19669058 [patent_doc_number] => 12181802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/669441 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 8390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17669441 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18548393 [patent_doc_number] => 11721755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Methods of forming semiconductor power devices having graded lateral doping [patent_app_type] => utility [patent_app_number] => 17/669409 [patent_app_country] => US [patent_app_date] => 2022-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 11529 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17669409 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19494308 [patent_doc_number] => 12113032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Substrate having undercut portion for stress mitigation [patent_app_type] => utility [patent_app_number] => 17/667645 [patent_app_country] => US [patent_app_date] => 2022-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8843 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17667645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20443239 [patent_doc_number] => 12514086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Display substrate and display device each having connecting trace connecting drive circuit pin and flexible circuit board pin and method for manufacturing the display substrate [patent_app_type] => utility [patent_app_number] => 18/016931 [patent_app_country] => US [patent_app_date] => 2022-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 1239 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18016931 [rel_patent_id] =>[rel_patent_doc_number] =>)