Search

Hafizur Rahman

Examiner (ID: 10494, Phone: (571)270-0659 , Office: P/2842 )

Most Active Art Unit
2843
Art Unit(s)
2842, 2843
Total Applications
739
Issued Applications
629
Pending Applications
72
Abandoned Applications
38

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5381475 [patent_doc_number] => 20090193314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'FORWARD ERROR CORRECTION FOR BURST AND RANDOM PACKET LOSS FOR REAL-TIME MULTI-MEDIA COMMUNICATION' [patent_app_type] => utility [patent_app_number] => 12/358181 [patent_app_country] => US [patent_app_date] => 2009-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 12086 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20090193314.pdf [firstpage_image] =>[orig_patent_app_number] => 12358181 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/358181
Forward error correction for burst and random packet loss for real-time multi-media communication Jan 21, 2009 Issued
Array ( [id] => 8580967 [patent_doc_number] => 08347199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Enhanced error detection in multilink serdes channels' [patent_app_type] => utility [patent_app_number] => 12/357022 [patent_app_country] => US [patent_app_date] => 2009-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 8799 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12357022 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/357022
Enhanced error detection in multilink serdes channels Jan 20, 2009 Issued
Array ( [id] => 6409892 [patent_doc_number] => 20100180179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'PROTECTING AND MIGRATING MEMORY LINES' [patent_app_type] => utility [patent_app_number] => 12/352744 [patent_app_country] => US [patent_app_date] => 2009-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4457 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20100180179.pdf [firstpage_image] =>[orig_patent_app_number] => 12352744 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/352744
Protecting and migrating memory lines Jan 12, 2009 Issued
Array ( [id] => 6409683 [patent_doc_number] => 20100180154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'Built In Self-Test of Memory Stressor' [patent_app_type] => utility [patent_app_number] => 12/352633 [patent_app_country] => US [patent_app_date] => 2009-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20100180154.pdf [firstpage_image] =>[orig_patent_app_number] => 12352633 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/352633
Built In Self-Test of Memory Stressor Jan 12, 2009 Abandoned
Array ( [id] => 8308757 [patent_doc_number] => 08230312 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-07-24 [patent_title] => 'Iterative decoder memory arrangement' [patent_app_type] => utility [patent_app_number] => 12/350885 [patent_app_country] => US [patent_app_date] => 2009-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 6799 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12350885 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/350885
Iterative decoder memory arrangement Jan 7, 2009 Issued
Array ( [id] => 4614261 [patent_doc_number] => 07996722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'Method for debugging a hang condition in a process without affecting the process state' [patent_app_type] => utility [patent_app_number] => 12/348079 [patent_app_country] => US [patent_app_date] => 2009-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4345 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/996/07996722.pdf [firstpage_image] =>[orig_patent_app_number] => 12348079 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/348079
Method for debugging a hang condition in a process without affecting the process state Jan 1, 2009 Issued
Array ( [id] => 6642763 [patent_doc_number] => 20100174388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'Live Device Graphical Status Tree' [patent_app_type] => utility [patent_app_number] => 12/348214 [patent_app_country] => US [patent_app_date] => 2009-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6210 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20100174388.pdf [firstpage_image] =>[orig_patent_app_number] => 12348214 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/348214
Live Device Graphical Status Tree Jan 1, 2009 Abandoned
Array ( [id] => 7547955 [patent_doc_number] => 08055936 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'System and method for data recovery in a disabled integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/347772 [patent_app_country] => US [patent_app_date] => 2008-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4093 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/055/08055936.pdf [firstpage_image] =>[orig_patent_app_number] => 12347772 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/347772
System and method for data recovery in a disabled integrated circuit Dec 30, 2008 Issued
Array ( [id] => 6368882 [patent_doc_number] => 20100088542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-08 [patent_title] => 'LOCKUP RECOVERY FOR PROCESSORS' [patent_app_type] => utility [patent_app_number] => 12/347804 [patent_app_country] => US [patent_app_date] => 2008-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2252 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0088/20100088542.pdf [firstpage_image] =>[orig_patent_app_number] => 12347804 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/347804
LOCKUP RECOVERY FOR PROCESSORS Dec 30, 2008 Abandoned
Array ( [id] => 6450234 [patent_doc_number] => 20100169886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'DISTRIBUTED MEMORY SYNCHRONIZED PROCESSING ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 12/347390 [patent_app_country] => US [patent_app_date] => 2008-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5296 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169886.pdf [firstpage_image] =>[orig_patent_app_number] => 12347390 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/347390
DISTRIBUTED MEMORY SYNCHRONIZED PROCESSING ARCHITECTURE Dec 30, 2008 Abandoned
Array ( [id] => 4549954 [patent_doc_number] => 07925925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Delta checkpoints for a non-volatile memory indirection table' [patent_app_type] => utility [patent_app_number] => 12/345997 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2689 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/925/07925925.pdf [firstpage_image] =>[orig_patent_app_number] => 12345997 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345997
Delta checkpoints for a non-volatile memory indirection table Dec 29, 2008 Issued
Array ( [id] => 6446936 [patent_doc_number] => 20100169707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'FAILURE HANDLING USING OVERLAY OBJECTS ON A FILE SYSTEM USING OBJECT BASED STORAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 12/346374 [patent_app_country] => US [patent_app_date] => 2008-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12627 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169707.pdf [firstpage_image] =>[orig_patent_app_number] => 12346374 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/346374
Failure handling using overlay objects on a file system using object based storage devices Dec 29, 2008 Issued
Array ( [id] => 6449690 [patent_doc_number] => 20100153781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'SERVER-TO-SERVER INTEGRITY CHECKING' [patent_app_type] => utility [patent_app_number] => 12/334611 [patent_app_country] => US [patent_app_date] => 2008-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6234 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20100153781.pdf [firstpage_image] =>[orig_patent_app_number] => 12334611 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/334611
Server-to-server integrity checking Dec 14, 2008 Issued
Array ( [id] => 6449804 [patent_doc_number] => 20100153791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'MANAGING BY ONE PROCESS STATE OF ANOTHER PROCESS TO FACILITATE HANDLING OF ERROR CONDITIONS' [patent_app_type] => utility [patent_app_number] => 12/334826 [patent_app_country] => US [patent_app_date] => 2008-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20100153791.pdf [firstpage_image] =>[orig_patent_app_number] => 12334826 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/334826
Managing by one process state of another process to facilitate handling of error conditions Dec 14, 2008 Issued
Array ( [id] => 5560083 [patent_doc_number] => 20090271660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'MOTHERBOARD, A METHOD FOR RECOVERING THE BIOS THEREOF AND A METHOD FOR BOOTING A COMPUTER' [patent_app_type] => utility [patent_app_number] => 12/333314 [patent_app_country] => US [patent_app_date] => 2008-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3082 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20090271660.pdf [firstpage_image] =>[orig_patent_app_number] => 12333314 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333314
MOTHERBOARD, A METHOD FOR RECOVERING THE BIOS THEREOF AND A METHOD FOR BOOTING A COMPUTER Dec 11, 2008 Abandoned
Array ( [id] => 6241490 [patent_doc_number] => 20100269107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'METHOD AND SYSTEM FOR NOTIFYING ERROR INFORMATION IN A NETWORK' [patent_app_type] => utility [patent_app_number] => 12/744646 [patent_app_country] => US [patent_app_date] => 2008-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2453 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0269/20100269107.pdf [firstpage_image] =>[orig_patent_app_number] => 12744646 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/744646
Method and system for notifying error information in a network Nov 18, 2008 Issued
Array ( [id] => 6630366 [patent_doc_number] => 20100100871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-22 [patent_title] => 'METHOD AND SYSTEM FOR EVALUATING SOFTWARE QUALITY' [patent_app_type] => utility [patent_app_number] => 12/255753 [patent_app_country] => US [patent_app_date] => 2008-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 12998 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20100100871.pdf [firstpage_image] =>[orig_patent_app_number] => 12255753 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/255753
Method and system for evaluating software quality Oct 21, 2008 Issued
Array ( [id] => 7768308 [patent_doc_number] => 08117502 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-14 [patent_title] => 'Bisectional fault detection system' [patent_app_type] => utility [patent_app_number] => 12/196931 [patent_app_country] => US [patent_app_date] => 2008-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4469 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/117/08117502.pdf [firstpage_image] =>[orig_patent_app_number] => 12196931 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/196931
Bisectional fault detection system Aug 21, 2008 Issued
Array ( [id] => 6040690 [patent_doc_number] => 20110093739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'FAULT MANAGEMENT FOR A COMMUNICATION BUS' [patent_app_type] => utility [patent_app_number] => 12/997993 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4110 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20110093739.pdf [firstpage_image] =>[orig_patent_app_number] => 12997993 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/997993
Fault management for a communication bus Jun 29, 2008 Issued
Array ( [id] => 8120259 [patent_doc_number] => 08161352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Method for providing unequal error protection to data packets in a burst transmission system' [patent_app_type] => utility [patent_app_number] => 12/147576 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4123 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/161/08161352.pdf [firstpage_image] =>[orig_patent_app_number] => 12147576 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/147576
Method for providing unequal error protection to data packets in a burst transmission system Jun 26, 2008 Issued
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