Search

Hafizur Rahman

Examiner (ID: 10494, Phone: (571)270-0659 , Office: P/2842 )

Most Active Art Unit
2843
Art Unit(s)
2842, 2843
Total Applications
739
Issued Applications
629
Pending Applications
72
Abandoned Applications
38

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7684029 [patent_doc_number] => 20100122112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'System and Method for Communication Error Processing in Outside Channel Combination Environment' [patent_app_type] => utility [patent_app_number] => 12/444827 [patent_app_country] => US [patent_app_date] => 2006-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8921 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20100122112.pdf [firstpage_image] =>[orig_patent_app_number] => 12444827 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/444827
System and method for communication error processing in outside channel combination environment Dec 7, 2006 Issued
Array ( [id] => 4881955 [patent_doc_number] => 20080155338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'SOFTWARE TESTING FRAMEWORK FOR MULTIPLE OPERATING SYSTEM, HARDWARE, AND SOFTWARE CONFIGURATIONS' [patent_app_type] => utility [patent_app_number] => 11/538196 [patent_app_country] => US [patent_app_date] => 2006-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5386 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20080155338.pdf [firstpage_image] =>[orig_patent_app_number] => 11538196 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/538196
Software testing framework for multiple operating system, hardware, and software configurations Oct 2, 2006 Issued
Array ( [id] => 590520 [patent_doc_number] => 07464289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-09 [patent_title] => 'Storage system and method for handling bad storage device data therefor' [patent_app_type] => utility [patent_app_number] => 11/296453 [patent_app_country] => US [patent_app_date] => 2005-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5271 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/464/07464289.pdf [firstpage_image] =>[orig_patent_app_number] => 11296453 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/296453
Storage system and method for handling bad storage device data therefor Dec 7, 2005 Issued
Array ( [id] => 605025 [patent_doc_number] => 07434105 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-10-07 [patent_title] => 'Selective self-healing of memory errors using allocation location information' [patent_app_type] => utility [patent_app_number] => 11/268360 [patent_app_country] => US [patent_app_date] => 2005-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9362 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 11 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/434/07434105.pdf [firstpage_image] =>[orig_patent_app_number] => 11268360 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/268360
Selective self-healing of memory errors using allocation location information Nov 6, 2005 Issued
Array ( [id] => 5679464 [patent_doc_number] => 20060184820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Storage system' [patent_app_type] => utility [patent_app_number] => 11/114198 [patent_app_country] => US [patent_app_date] => 2005-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7515 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20060184820.pdf [firstpage_image] =>[orig_patent_app_number] => 11114198 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/114198
Storage system Apr 25, 2005 Issued
Array ( [id] => 368386 [patent_doc_number] => 07480836 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-20 [patent_title] => 'Monitoring error-handler vector in architected memory' [patent_app_type] => utility [patent_app_number] => 11/113661 [patent_app_country] => US [patent_app_date] => 2005-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1629 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/480/07480836.pdf [firstpage_image] =>[orig_patent_app_number] => 11113661 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/113661
Monitoring error-handler vector in architected memory Apr 24, 2005 Issued
Array ( [id] => 5816593 [patent_doc_number] => 20060085684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'System and method for providing mutual breakpoint capabilities in a computing device' [patent_app_type] => utility [patent_app_number] => 11/055974 [patent_app_country] => US [patent_app_date] => 2005-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9221 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20060085684.pdf [firstpage_image] =>[orig_patent_app_number] => 11055974 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/055974
System and method for providing mutual breakpoint capabilities in a computing device Feb 13, 2005 Issued
Array ( [id] => 813357 [patent_doc_number] => 07418629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-26 [patent_title] => 'Synchronizing triggering of multiple hardware trace facilities using an existing system bus' [patent_app_type] => utility [patent_app_number] => 11/055870 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7781 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/418/07418629.pdf [firstpage_image] =>[orig_patent_app_number] => 11055870 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/055870
Synchronizing triggering of multiple hardware trace facilities using an existing system bus Feb 10, 2005 Issued
Array ( [id] => 600408 [patent_doc_number] => 07437618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Method in a processor for dynamically during runtime allocating memory for in-memory hardware tracing' [patent_app_type] => utility [patent_app_number] => 11/055977 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 10363 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/437/07437618.pdf [firstpage_image] =>[orig_patent_app_number] => 11055977 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/055977
Method in a processor for dynamically during runtime allocating memory for in-memory hardware tracing Feb 10, 2005 Issued
Array ( [id] => 5679477 [patent_doc_number] => 20060184833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Method, apparatus, and computer program product in a processor for performing in-memory tracing using existing communication paths' [patent_app_type] => utility [patent_app_number] => 11/055821 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9933 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20060184833.pdf [firstpage_image] =>[orig_patent_app_number] => 11055821 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/055821
Method in a processor for performing in-memory tracing using existing communication paths Feb 10, 2005 Issued
Array ( [id] => 600407 [patent_doc_number] => 07437617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-14 [patent_title] => 'Method, apparatus, and computer program product in a processor for concurrently sharing a memory controller among a tracing process and non-tracing processes using a programmable variable number of shared memory write buffers' [patent_app_type] => utility [patent_app_number] => 11/055845 [patent_app_country] => US [patent_app_date] => 2005-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 10249 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/437/07437617.pdf [firstpage_image] =>[orig_patent_app_number] => 11055845 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/055845
Method, apparatus, and computer program product in a processor for concurrently sharing a memory controller among a tracing process and non-tracing processes using a programmable variable number of shared memory write buffers Feb 10, 2005 Issued
Menu