Search

Hai H Huynh

Examiner (ID: 17331, Phone: (571)272-4844 , Office: P/3747 )

Most Active Art Unit
3747
Art Unit(s)
3747, 3741
Total Applications
2951
Issued Applications
2659
Pending Applications
119
Abandoned Applications
173

Applications

Application numberTitle of the applicationFiling DateStatus
08/870013 MICROPROCESSOR WITH INSTRUCTION LEVEL RECONFIGURABLE CACHE Feb 2, 1997 Abandoned
Array ( [id] => 3833320 [patent_doc_number] => 05813026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Portable electronic device for intermittently executing a program stored on transposable memory' [patent_app_type] => 1 [patent_app_number] => 8/792029 [patent_app_country] => US [patent_app_date] => 1997-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/813/05813026.pdf [firstpage_image] =>[orig_patent_app_number] => 792029 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/792029
Portable electronic device for intermittently executing a program stored on transposable memory Jan 30, 1997 Issued
Array ( [id] => 3897343 [patent_doc_number] => 05805850 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Very long instruction word (VLIW) computer having efficient instruction code format' [patent_app_type] => 1 [patent_app_number] => 8/790839 [patent_app_country] => US [patent_app_date] => 1997-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 11868 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805850.pdf [firstpage_image] =>[orig_patent_app_number] => 790839 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/790839
Very long instruction word (VLIW) computer having efficient instruction code format Jan 29, 1997 Issued
Array ( [id] => 4023604 [patent_doc_number] => 05889986 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Instruction fetch unit including instruction buffer and secondary or branch target buffer that transfers prefetched instructions to the instruction buffer' [patent_app_type] => 1 [patent_app_number] => 8/790028 [patent_app_country] => US [patent_app_date] => 1997-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3213 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/889/05889986.pdf [firstpage_image] =>[orig_patent_app_number] => 790028 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/790028
Instruction fetch unit including instruction buffer and secondary or branch target buffer that transfers prefetched instructions to the instruction buffer Jan 27, 1997 Issued
Array ( [id] => 3849707 [patent_doc_number] => 05815698 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Microprocessor having delayed instructions' [patent_app_type] => 1 [patent_app_number] => 8/788839 [patent_app_country] => US [patent_app_date] => 1997-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 11058 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/815/05815698.pdf [firstpage_image] =>[orig_patent_app_number] => 788839 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/788839
Microprocessor having delayed instructions Jan 26, 1997 Issued
Array ( [id] => 3781855 [patent_doc_number] => 05845307 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'Auxiliary register file accessing technique' [patent_app_type] => 1 [patent_app_number] => 8/787339 [patent_app_country] => US [patent_app_date] => 1997-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2571 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/845/05845307.pdf [firstpage_image] =>[orig_patent_app_number] => 787339 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/787339
Auxiliary register file accessing technique Jan 26, 1997 Issued
Array ( [id] => 3904584 [patent_doc_number] => 05778189 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'System and method for converting communication protocols' [patent_app_type] => 1 [patent_app_number] => 8/786235 [patent_app_country] => US [patent_app_date] => 1997-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7967 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778189.pdf [firstpage_image] =>[orig_patent_app_number] => 786235 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/786235
System and method for converting communication protocols Jan 20, 1997 Issued
Array ( [id] => 3775795 [patent_doc_number] => 05742780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Dual pipeline superscalar reduced instruction set computer system architecture' [patent_app_type] => 1 [patent_app_number] => 8/783810 [patent_app_country] => US [patent_app_date] => 1997-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 35 [patent_no_of_words] => 11028 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742780.pdf [firstpage_image] =>[orig_patent_app_number] => 783810 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/783810
Dual pipeline superscalar reduced instruction set computer system architecture Jan 15, 1997 Issued
Array ( [id] => 332727 [patent_doc_number] => 07512671 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-03-31 [patent_title] => 'Computer system for enabling a wireless interface device to selectively establish a communication link with a user selectable remote computer' [patent_app_type] => utility [patent_app_number] => 08/783708 [patent_app_country] => US [patent_app_date] => 1997-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 108 [patent_figures_cnt] => 192 [patent_no_of_words] => 43903 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/512/07512671.pdf [firstpage_image] =>[orig_patent_app_number] => 08783708 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/783708
Computer system for enabling a wireless interface device to selectively establish a communication link with a user selectable remote computer Jan 14, 1997 Issued
Array ( [id] => 3839592 [patent_doc_number] => 05732254 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Pipeline system branch history table storing branch instruction addresses and target addresses with inhibit bits' [patent_app_type] => 1 [patent_app_number] => 8/783039 [patent_app_country] => US [patent_app_date] => 1997-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 9898 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/732/05732254.pdf [firstpage_image] =>[orig_patent_app_number] => 783039 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/783039
Pipeline system branch history table storing branch instruction addresses and target addresses with inhibit bits Jan 13, 1997 Issued
Array ( [id] => 3923551 [patent_doc_number] => 05938730 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Method of managing software by transmitted data on network' [patent_app_type] => 1 [patent_app_number] => 8/780924 [patent_app_country] => US [patent_app_date] => 1997-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3834 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/938/05938730.pdf [firstpage_image] =>[orig_patent_app_number] => 780924 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/780924
Method of managing software by transmitted data on network Jan 8, 1997 Issued
Array ( [id] => 4030845 [patent_doc_number] => 05881242 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Method and system of parsing frame headers for routing data frames within a computer network' [patent_app_type] => 1 [patent_app_number] => 8/780803 [patent_app_country] => US [patent_app_date] => 1997-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7272 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881242.pdf [firstpage_image] =>[orig_patent_app_number] => 780803 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/780803
Method and system of parsing frame headers for routing data frames within a computer network Jan 8, 1997 Issued
08/780216 SYSTEM FOR TRANSMITTING MESSAGES BETWEEN AN INSTALLED NETWORK AND A WIRELESS DEVICE Jan 7, 1997 Abandoned
Array ( [id] => 3915150 [patent_doc_number] => 05944792 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Data transfer device with computed start times for data blocks' [patent_app_type] => 1 [patent_app_number] => 8/780219 [patent_app_country] => US [patent_app_date] => 1997-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 13605 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/944/05944792.pdf [firstpage_image] =>[orig_patent_app_number] => 780219 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/780219
Data transfer device with computed start times for data blocks Jan 7, 1997 Issued
Array ( [id] => 4069898 [patent_doc_number] => 05864674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Reconfigurable lan and method of adding clients thereto' [patent_app_type] => 1 [patent_app_number] => 8/778481 [patent_app_country] => US [patent_app_date] => 1997-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2013 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/864/05864674.pdf [firstpage_image] =>[orig_patent_app_number] => 778481 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/778481
Reconfigurable lan and method of adding clients thereto Jan 2, 1997 Issued
Array ( [id] => 3753063 [patent_doc_number] => 05754461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Arithmetic processing method' [patent_app_type] => 1 [patent_app_number] => 8/778328 [patent_app_country] => US [patent_app_date] => 1997-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 7737 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754461.pdf [firstpage_image] =>[orig_patent_app_number] => 778328 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/778328
Arithmetic processing method Jan 1, 1997 Issued
Array ( [id] => 3829059 [patent_doc_number] => 05812749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Method of and system for testing network time protocol client accuracy' [patent_app_type] => 1 [patent_app_number] => 8/773435 [patent_app_country] => US [patent_app_date] => 1996-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2916 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812749.pdf [firstpage_image] =>[orig_patent_app_number] => 773435 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/773435
Method of and system for testing network time protocol client accuracy Dec 26, 1996 Issued
Array ( [id] => 4168465 [patent_doc_number] => 06149317 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Information providing apparatus and method having image retrieving function' [patent_app_type] => 1 [patent_app_number] => 8/772582 [patent_app_country] => US [patent_app_date] => 1996-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2893 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/149/06149317.pdf [firstpage_image] =>[orig_patent_app_number] => 772582 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/772582
Information providing apparatus and method having image retrieving function Dec 25, 1996 Issued
08/772191 MICROCOMPUTER SYSTEM FOR DIGITAL SIGNAL PROCESSING Dec 19, 1996 Abandoned
Array ( [id] => 3952231 [patent_doc_number] => 05872978 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Method and apparatus for improved translation of program data into machine code format' [patent_app_type] => 1 [patent_app_number] => 8/770029 [patent_app_country] => US [patent_app_date] => 1996-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2387 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872978.pdf [firstpage_image] =>[orig_patent_app_number] => 770029 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/770029
Method and apparatus for improved translation of program data into machine code format Dec 18, 1996 Issued
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