Application number | Title of the application | Filing Date | Status |
---|
Array
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[patent_kind] => NA
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Array
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Array
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[patent_kind] => NA
[patent_issue_date] => 1995-02-14
[patent_title] => 'Responding to service requests using minimal system-side context in a multiprocessor environment'
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Array
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[patent_doc_number] => 05854907
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-29
[patent_title] => 'Microcomputer for digital signal processing having on-chip memory and external memory access'
[patent_app_type] => 1
[patent_app_number] => 8/272729
[patent_app_country] => US
[patent_app_date] => 1994-07-08
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Array
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[patent_kind] => NA
[patent_issue_date] => 1995-04-18
[patent_title] => 'Computer system for sensing a cable-connected peripheral and for supplying power thereto'
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Array
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Array
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[patent_doc_number] => 05421010
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[patent_kind] => NA
[patent_issue_date] => 1995-05-30
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[firstpage_image] =>[orig_patent_app_number] => 267293
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/267293 | Circuit and a method for selecting the kappa greatest data in a data sequence | Jun 27, 1994 | Issued |
Array
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[id] => 3527076
[patent_doc_number] => 05487153
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-23
[patent_title] => 'Neural network sequencer and interface apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/267005
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 267005
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/267005 | Neural network sequencer and interface apparatus | Jun 23, 1994 | Issued |
Array
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[id] => 3565972
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-12
[patent_title] => 'Method and apparatus for controlling the saving of pipelines in pipelined processors during trap handling'
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[patent_app_number] => 8/265495
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[firstpage_image] =>[orig_patent_app_number] => 265495
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Array
(
[id] => 3681605
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-04
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Array
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[id] => 3465983
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[patent_country] => US
[patent_kind] => NA
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[patent_app_type] => 1
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[firstpage_image] =>[orig_patent_app_number] => 255294
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/255294 | Array of one-bit processors each having only one bit of memory | Jun 6, 1994 | Issued |
Array
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Array
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Array
(
[id] => 3120278
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[patent_kind] => NA
[patent_issue_date] => 1995-05-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/251651 | Arithmetic unit for SIMD type parallel computer | May 30, 1994 | Issued |
08/247657 | METHOD AND APPARATUS FOR DYNAMICALLY ADJUSTING THE NUMBER OF STAGES OF A MULTIPLE STAGE PIPELINE | May 22, 1994 | Abandoned |
08/243921 | MULTI-PROCESSOR COMPUTER SYSTEM WITH SYSTEM MONITORING BY EACH PROCESSOR AND EXCHANGE OF SYSTEM STATUS INFORMATION BETWEEN INDIVIDUAL PROCESSORS | May 16, 1994 | Abandoned |
Array
(
[id] => 3636611
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-18
[patent_title] => 'Method and apparatus for preemptable multiplexing of connections to input/out devices'
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[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/239326 | Method and apparatus for preemptable multiplexing of connections to input/out devices | May 5, 1994 | Issued |
08/238541 | MULTIPROCESSOR SYSTEM WITH A SHARED CONTROL STORE ACCESSED WITH PREDICTED ADDRESSES | May 4, 1994 | Abandoned |
Array
(
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[patent_kind] => NA
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Array
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