Search

Hai L Nguyen

Examiner (ID: 11556, Phone: (571)272-1747 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2842
Total Applications
2250
Issued Applications
1990
Pending Applications
71
Abandoned Applications
221

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8272348 [patent_doc_number] => 08213862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Headset charge via short-range RF communication' [patent_app_type] => utility [patent_app_number] => 12/367234 [patent_app_country] => US [patent_app_date] => 2009-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2999 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12367234 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/367234
Headset charge via short-range RF communication Feb 5, 2009 Issued
Array ( [id] => 8246498 [patent_doc_number] => 08204440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Wireless transmitting/receiving device' [patent_app_type] => utility [patent_app_number] => 12/366647 [patent_app_country] => US [patent_app_date] => 2009-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1897 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/204/08204440.pdf [firstpage_image] =>[orig_patent_app_number] => 12366647 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/366647
Wireless transmitting/receiving device Feb 5, 2009 Issued
Array ( [id] => 5525207 [patent_doc_number] => 20090195284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'SEMICONDUCTOR DEVICE EQUIPPED WITH A PULL-DOWN CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/365503 [patent_app_country] => US [patent_app_date] => 2009-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2394 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20090195284.pdf [firstpage_image] =>[orig_patent_app_number] => 12365503 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/365503
Semiconductor device equipped with a pull-down circuit Feb 3, 2009 Issued
Array ( [id] => 7551361 [patent_doc_number] => 08063696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-22 [patent_title] => 'Receiving circuit and receiving system' [patent_app_type] => utility [patent_app_number] => 12/597885 [patent_app_country] => US [patent_app_date] => 2009-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6469 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/063/08063696.pdf [firstpage_image] =>[orig_patent_app_number] => 12597885 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/597885
Receiving circuit and receiving system Feb 1, 2009 Issued
Array ( [id] => 5378118 [patent_doc_number] => 20090189957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'DRIVING CIRCUIT FOR CAPACITIVE LOAD AND FLUID INJECTING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/363446 [patent_app_country] => US [patent_app_date] => 2009-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6424 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20090189957.pdf [firstpage_image] =>[orig_patent_app_number] => 12363446 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/363446
Driving circuit for capacitive load and fluid injecting device Jan 29, 2009 Issued
Array ( [id] => 5377614 [patent_doc_number] => 20090189453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-30 [patent_title] => 'DRIVING CIRCUIT FOR CAPACITIVE LOAD AND FLUID INJECTING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/363451 [patent_app_country] => US [patent_app_date] => 2009-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4770 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20090189453.pdf [firstpage_image] =>[orig_patent_app_number] => 12363451 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/363451
Driving circuit for capacitive load and fluid injecting device Jan 29, 2009 Issued
Array ( [id] => 104267 [patent_doc_number] => 07724057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'Current-controlled CMOS logic family' [patent_app_type] => utility [patent_app_number] => 12/363202 [patent_app_country] => US [patent_app_date] => 2009-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5245 [patent_no_of_claims] => 93 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/724/07724057.pdf [firstpage_image] =>[orig_patent_app_number] => 12363202 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/363202
Current-controlled CMOS logic family Jan 29, 2009 Issued
Array ( [id] => 8871340 [patent_doc_number] => 08466719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Frequency doubler, signal generator, optical transmitter, and optical communication apparatus' [patent_app_type] => utility [patent_app_number] => 12/320593 [patent_app_country] => US [patent_app_date] => 2009-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 27 [patent_no_of_words] => 8499 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12320593 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/320593
Frequency doubler, signal generator, optical transmitter, and optical communication apparatus Jan 28, 2009 Issued
Array ( [id] => 5401835 [patent_doc_number] => 20090237148 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'CHARGE PUMP CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/354319 [patent_app_country] => US [patent_app_date] => 2009-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10893 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20090237148.pdf [firstpage_image] =>[orig_patent_app_number] => 12354319 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/354319
Charge pump circuit Jan 14, 2009 Issued
Array ( [id] => 4434163 [patent_doc_number] => 07969202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-28 [patent_title] => 'Fractional-N frequency synthesizer' [patent_app_type] => utility [patent_app_number] => 12/353846 [patent_app_country] => US [patent_app_date] => 2009-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7059 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/969/07969202.pdf [firstpage_image] =>[orig_patent_app_number] => 12353846 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/353846
Fractional-N frequency synthesizer Jan 13, 2009 Issued
Array ( [id] => 6248254 [patent_doc_number] => 20100026372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'Power switch for transmitting a power source of low voltage between regular mode and deep-power-down mode' [patent_app_type] => utility [patent_app_number] => 12/353247 [patent_app_country] => US [patent_app_date] => 2009-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3181 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20100026372.pdf [firstpage_image] =>[orig_patent_app_number] => 12353247 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/353247
Power switch for transmitting a power source of low voltage between regular mode and deep-power-down mode Jan 12, 2009 Abandoned
Array ( [id] => 14918 [patent_doc_number] => 07808292 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-05 [patent_title] => 'Clock circuit for a microprocessor' [patent_app_type] => utility [patent_app_number] => 12/352282 [patent_app_country] => US [patent_app_date] => 2009-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2376 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/808/07808292.pdf [firstpage_image] =>[orig_patent_app_number] => 12352282 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/352282
Clock circuit for a microprocessor Jan 11, 2009 Issued
Array ( [id] => 6386181 [patent_doc_number] => 20100176860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'Clocked D-type Flip Flop circuit' [patent_app_type] => utility [patent_app_number] => 12/319685 [patent_app_country] => US [patent_app_date] => 2009-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2911 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20100176860.pdf [firstpage_image] =>[orig_patent_app_number] => 12319685 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/319685
Clocked D-type Flip Flop circuit Jan 8, 2009 Abandoned
Array ( [id] => 5353398 [patent_doc_number] => 20090184742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-23 [patent_title] => 'Externally Synchronizing Multiphase Pulse Width Modulation Signals' [patent_app_type] => utility [patent_app_number] => 12/351371 [patent_app_country] => US [patent_app_date] => 2009-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5945 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20090184742.pdf [firstpage_image] =>[orig_patent_app_number] => 12351371 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/351371
Externally synchronizing multiphase pulse width modulation signals Jan 8, 2009 Issued
Array ( [id] => 6609909 [patent_doc_number] => 20100171538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'BUFFER FOR DRIVING CIRCUIT AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/349501 [patent_app_country] => US [patent_app_date] => 2009-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2338 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20100171538.pdf [firstpage_image] =>[orig_patent_app_number] => 12349501 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/349501
Buffer for driving circuit and method thereof Jan 5, 2009 Issued
Array ( [id] => 6396191 [patent_doc_number] => 20100164561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'SYSTEM AND METHOD FOR WIDEBAND PHASE-ADJUSTABLE COMMON EXCITATION' [patent_app_type] => utility [patent_app_number] => 12/344961 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4542 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20100164561.pdf [firstpage_image] =>[orig_patent_app_number] => 12344961 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/344961
System and method for wideband phase-adjustable common excitation Dec 28, 2008 Issued
Array ( [id] => 5930 [patent_doc_number] => 07812657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Methods and apparatus for synchronizing with a clock signal' [patent_app_type] => utility [patent_app_number] => 12/345039 [patent_app_country] => US [patent_app_date] => 2008-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7558 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/812/07812657.pdf [firstpage_image] =>[orig_patent_app_number] => 12345039 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/345039
Methods and apparatus for synchronizing with a clock signal Dec 28, 2008 Issued
Array ( [id] => 5432805 [patent_doc_number] => 20090167391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'QUARTER CYCLE DELAY CLOCK GENERATOR' [patent_app_type] => utility [patent_app_number] => 12/344393 [patent_app_country] => US [patent_app_date] => 2008-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20090167391.pdf [firstpage_image] =>[orig_patent_app_number] => 12344393 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/344393
QUARTER CYCLE DELAY CLOCK GENERATOR Dec 25, 2008 Abandoned
Array ( [id] => 23779 [patent_doc_number] => 07800433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Power supply switching circuit' [patent_app_type] => utility [patent_app_number] => 12/342232 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3314 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/800/07800433.pdf [firstpage_image] =>[orig_patent_app_number] => 12342232 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/342232
Power supply switching circuit Dec 22, 2008 Issued
Array ( [id] => 75689 [patent_doc_number] => 07750691 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-07-06 [patent_title] => 'Clock driver circuit' [patent_app_type] => utility [patent_app_number] => 12/340658 [patent_app_country] => US [patent_app_date] => 2008-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3521 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/750/07750691.pdf [firstpage_image] =>[orig_patent_app_number] => 12340658 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/340658
Clock driver circuit Dec 19, 2008 Issued
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