Search

Hai L Nguyen

Examiner (ID: 11556, Phone: (571)272-1747 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2842
Total Applications
2250
Issued Applications
1990
Pending Applications
71
Abandoned Applications
221

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4631156 [patent_doc_number] => 08010065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-30 [patent_title] => 'Power amplifier system and control method and control device thereof' [patent_app_type] => utility [patent_app_number] => 12/262198 [patent_app_country] => US [patent_app_date] => 2008-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/010/08010065.pdf [firstpage_image] =>[orig_patent_app_number] => 12262198 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/262198
Power amplifier system and control method and control device thereof Oct 30, 2008 Issued
Array ( [id] => 5334934 [patent_doc_number] => 20090051398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'METHOD AND DELAY CIRCUIT WITH ACCURATELY CONTROLLED DUTY CYCLE' [patent_app_type] => utility [patent_app_number] => 12/261941 [patent_app_country] => US [patent_app_date] => 2008-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6333 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20090051398.pdf [firstpage_image] =>[orig_patent_app_number] => 12261941 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/261941
Method and delay circuit with accurately controlled duty cycle Oct 29, 2008 Issued
Array ( [id] => 103535 [patent_doc_number] => 07728649 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-06-01 [patent_title] => 'Leakage current cancellation for integrated analog switch' [patent_app_type] => utility [patent_app_number] => 12/261087 [patent_app_country] => US [patent_app_date] => 2008-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6865 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/728/07728649.pdf [firstpage_image] =>[orig_patent_app_number] => 12261087 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/261087
Leakage current cancellation for integrated analog switch Oct 29, 2008 Issued
Array ( [id] => 6306170 [patent_doc_number] => 20100109751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'HIGH-PERFORMANCE ANALOG SWITCH' [patent_app_type] => utility [patent_app_number] => 12/262116 [patent_app_country] => US [patent_app_date] => 2008-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2025 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20100109751.pdf [firstpage_image] =>[orig_patent_app_number] => 12262116 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/262116
High-performance analog switch Oct 29, 2008 Issued
Array ( [id] => 104288 [patent_doc_number] => 07724069 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-05-25 [patent_title] => 'Analog switch for operation outside power rails with low supply current' [patent_app_type] => utility [patent_app_number] => 12/260721 [patent_app_country] => US [patent_app_date] => 2008-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4968 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/724/07724069.pdf [firstpage_image] =>[orig_patent_app_number] => 12260721 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/260721
Analog switch for operation outside power rails with low supply current Oct 28, 2008 Issued
Array ( [id] => 5334936 [patent_doc_number] => 20090051400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'SYSTEM AND METHOD FOR FULLY DIGITAL CLOCK DIVIDER WITH NON-INTEGER DIVISOR SUPPORT' [patent_app_type] => utility [patent_app_number] => 12/259818 [patent_app_country] => US [patent_app_date] => 2008-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3684 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20090051400.pdf [firstpage_image] =>[orig_patent_app_number] => 12259818 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/259818
System and method for fully digital clock divider with non-integer divisor support Oct 27, 2008 Issued
Array ( [id] => 5933484 [patent_doc_number] => 20110210785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'CIRCUIT COMPRISING AT LEAST A FIRST TRANSISTOR GROUP AND A SECOND TRANSISTOR GROUP' [patent_app_type] => utility [patent_app_number] => 13/125929 [patent_app_country] => US [patent_app_date] => 2008-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4480 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20110210785.pdf [firstpage_image] =>[orig_patent_app_number] => 13125929 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/125929
Circuit comprising at least a first transistor group and a second transistor group Oct 23, 2008 Issued
Array ( [id] => 73102 [patent_doc_number] => 07755401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-13 [patent_title] => 'Semiconductor device including DLL circuit, and data processing system' [patent_app_type] => utility [patent_app_number] => 12/289137 [patent_app_country] => US [patent_app_date] => 2008-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4969 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/755/07755401.pdf [firstpage_image] =>[orig_patent_app_number] => 12289137 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/289137
Semiconductor device including DLL circuit, and data processing system Oct 20, 2008 Issued
Array ( [id] => 113194 [patent_doc_number] => 07719337 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/252954 [patent_app_country] => US [patent_app_date] => 2008-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 7507 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/719/07719337.pdf [firstpage_image] =>[orig_patent_app_number] => 12252954 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/252954
Semiconductor device Oct 15, 2008 Issued
Array ( [id] => 75676 [patent_doc_number] => 07750683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Phase/frequency detector' [patent_app_type] => utility [patent_app_number] => 12/252329 [patent_app_country] => US [patent_app_date] => 2008-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5144 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 406 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/750/07750683.pdf [firstpage_image] =>[orig_patent_app_number] => 12252329 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/252329
Phase/frequency detector Oct 14, 2008 Issued
Array ( [id] => 6462241 [patent_doc_number] => 20100090739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'Method and Apparatus for Removing Narrow Pulses from a Clock Waveform' [patent_app_type] => utility [patent_app_number] => 12/252118 [patent_app_country] => US [patent_app_date] => 2008-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4081 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20100090739.pdf [firstpage_image] =>[orig_patent_app_number] => 12252118 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/252118
Method and Apparatus for Removing Narrow Pulses from a Clock Waveform Oct 14, 2008 Abandoned
Array ( [id] => 191504 [patent_doc_number] => 07642818 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-01-05 [patent_title] => 'High voltage tolerant input circuit capable of operating at extremely low IO supply voltage' [patent_app_type] => utility [patent_app_number] => 12/250790 [patent_app_country] => US [patent_app_date] => 2008-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5139 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/642/07642818.pdf [firstpage_image] =>[orig_patent_app_number] => 12250790 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/250790
High voltage tolerant input circuit capable of operating at extremely low IO supply voltage Oct 13, 2008 Issued
Array ( [id] => 5328424 [patent_doc_number] => 20090108901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'PULSE GENERATION CIRCUIT AND UWB COMMUNICATION DEVICE' [patent_app_type] => utility [patent_app_number] => 12/250801 [patent_app_country] => US [patent_app_date] => 2008-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15979 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20090108901.pdf [firstpage_image] =>[orig_patent_app_number] => 12250801 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/250801
Pulse generation circuit and UWB communication device Oct 13, 2008 Issued
Array ( [id] => 5562085 [patent_doc_number] => 20090134937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-28 [patent_title] => 'Charge pump circuit' [patent_app_type] => utility [patent_app_number] => 12/287620 [patent_app_country] => US [patent_app_date] => 2008-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8143 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20090134937.pdf [firstpage_image] =>[orig_patent_app_number] => 12287620 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/287620
Charge pump circuit Oct 9, 2008 Issued
Array ( [id] => 124604 [patent_doc_number] => 07705667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-27 [patent_title] => 'Filter adjusting circuit' [patent_app_type] => utility [patent_app_number] => 12/246551 [patent_app_country] => US [patent_app_date] => 2008-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 12869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/705/07705667.pdf [firstpage_image] =>[orig_patent_app_number] => 12246551 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/246551
Filter adjusting circuit Oct 6, 2008 Issued
Array ( [id] => 6021974 [patent_doc_number] => 20110050300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'Clock Generator' [patent_app_type] => utility [patent_app_number] => 12/919186 [patent_app_country] => US [patent_app_date] => 2008-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2999 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20110050300.pdf [firstpage_image] =>[orig_patent_app_number] => 12919186 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/919186
Clock generator Sep 24, 2008 Issued
Array ( [id] => 4578449 [patent_doc_number] => 07830182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Comparator' [patent_app_type] => utility [patent_app_number] => 12/284246 [patent_app_country] => US [patent_app_date] => 2008-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3722 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/830/07830182.pdf [firstpage_image] =>[orig_patent_app_number] => 12284246 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/284246
Comparator Sep 18, 2008 Issued
Array ( [id] => 6296172 [patent_doc_number] => 20100066414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'LEAKAGE COMPENSATION FOR SAMPLE AND HOLD DEVICES' [patent_app_type] => utility [patent_app_number] => 12/233463 [patent_app_country] => US [patent_app_date] => 2008-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4380 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20100066414.pdf [firstpage_image] =>[orig_patent_app_number] => 12233463 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/233463
Leakage compensation for sample and hold devices Sep 17, 2008 Issued
Array ( [id] => 6568468 [patent_doc_number] => 20100060337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-11 [patent_title] => 'POWER SUPPLY INSENSITIVE VOLTAGE LEVEL TRANSLATOR' [patent_app_type] => utility [patent_app_number] => 12/205178 [patent_app_country] => US [patent_app_date] => 2008-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1142 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20100060337.pdf [firstpage_image] =>[orig_patent_app_number] => 12205178 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/205178
Power supply insensitive voltage level translator Sep 4, 2008 Issued
Array ( [id] => 6162223 [patent_doc_number] => 20110193602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'JITTER SUPPRESSION CIRCUIT AND JITTER SUPPRESSION METHOD' [patent_app_type] => utility [patent_app_number] => 12/672619 [patent_app_country] => US [patent_app_date] => 2008-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7937 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193602.pdf [firstpage_image] =>[orig_patent_app_number] => 12672619 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/672619
Jitter suppression circuit and jitter suppression method Sep 3, 2008 Issued
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