
Hai L Nguyen
Examiner (ID: 11556, Phone: (571)272-1747 , Office: P/2842 )
| Most Active Art Unit | 2842 |
| Art Unit(s) | 2816, 2842 |
| Total Applications | 2250 |
| Issued Applications | 1990 |
| Pending Applications | 71 |
| Abandoned Applications | 221 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8318049
[patent_doc_number] => 08232829
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-31
[patent_title] => 'Active rectifier'
[patent_app_type] => utility
[patent_app_number] => 11/954050
[patent_app_country] => US
[patent_app_date] => 2007-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2865
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11954050
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/954050 | Active rectifier | Dec 10, 2007 | Issued |
Array
(
[id] => 4673931
[patent_doc_number] => 20080211559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-04
[patent_title] => 'DATA HOLDING CIRCUIT AND SIGNAL PROCESSING CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/951893
[patent_app_country] => US
[patent_app_date] => 2007-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 11963
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0211/20080211559.pdf
[firstpage_image] =>[orig_patent_app_number] => 11951893
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/951893 | Data holding circuit and signal processing circuit | Dec 5, 2007 | Issued |
Array
(
[id] => 4749759
[patent_doc_number] => 20080157830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-03
[patent_title] => 'TRIANGLE OSCILLATOR AND PULSE WIDTH MODULATOR'
[patent_app_type] => utility
[patent_app_number] => 11/950443
[patent_app_country] => US
[patent_app_date] => 2007-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3564
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0157/20080157830.pdf
[firstpage_image] =>[orig_patent_app_number] => 11950443
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/950443 | TRIANGLE OSCILLATOR AND PULSE WIDTH MODULATOR | Dec 4, 2007 | Abandoned |
Array
(
[id] => 4715982
[patent_doc_number] => 20080238504
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-02
[patent_title] => 'Phase locked loop'
[patent_app_type] => utility
[patent_app_number] => 11/998894
[patent_app_country] => US
[patent_app_date] => 2007-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4193
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0238/20080238504.pdf
[firstpage_image] =>[orig_patent_app_number] => 11998894
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/998894 | Phase locked loop | Dec 2, 2007 | Abandoned |
Array
(
[id] => 319274
[patent_doc_number] => 07521987
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-04-21
[patent_title] => 'Multiple supply voltage select circuit for reduced supply voltage levels'
[patent_app_type] => utility
[patent_app_number] => 11/999192
[patent_app_country] => US
[patent_app_date] => 2007-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 6337
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/521/07521987.pdf
[firstpage_image] =>[orig_patent_app_number] => 11999192
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/999192 | Multiple supply voltage select circuit for reduced supply voltage levels | Dec 2, 2007 | Issued |
Array
(
[id] => 327213
[patent_doc_number] => 07514989
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-04-07
[patent_title] => 'Dynamic matching of current sources'
[patent_app_type] => utility
[patent_app_number] => 11/998100
[patent_app_country] => US
[patent_app_date] => 2007-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7070
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/514/07514989.pdf
[firstpage_image] =>[orig_patent_app_number] => 11998100
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/998100 | Dynamic matching of current sources | Nov 27, 2007 | Issued |
Array
(
[id] => 93602
[patent_doc_number] => 07737748
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-15
[patent_title] => 'Level shifter of semiconductor device and method for controlling duty ratio in the device'
[patent_app_type] => utility
[patent_app_number] => 11/986841
[patent_app_country] => US
[patent_app_date] => 2007-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6925
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/737/07737748.pdf
[firstpage_image] =>[orig_patent_app_number] => 11986841
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/986841 | Level shifter of semiconductor device and method for controlling duty ratio in the device | Nov 26, 2007 | Issued |
Array
(
[id] => 4572683
[patent_doc_number] => 07847607
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-12-07
[patent_title] => 'PLL circuit'
[patent_app_type] => utility
[patent_app_number] => 11/987003
[patent_app_country] => US
[patent_app_date] => 2007-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4057
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/847/07847607.pdf
[firstpage_image] =>[orig_patent_app_number] => 11987003
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/987003 | PLL circuit | Nov 25, 2007 | Issued |
Array
(
[id] => 4783177
[patent_doc_number] => 20080136506
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-12
[patent_title] => 'Output circuit for a bus'
[patent_app_type] => utility
[patent_app_number] => 11/984714
[patent_app_country] => US
[patent_app_date] => 2007-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6051
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0136/20080136506.pdf
[firstpage_image] =>[orig_patent_app_number] => 11984714
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/984714 | Output circuit for a bus | Nov 20, 2007 | Issued |
Array
(
[id] => 4763148
[patent_doc_number] => 20080174358
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-24
[patent_title] => 'Control circuit of P-type power transistor'
[patent_app_type] => utility
[patent_app_number] => 11/984776
[patent_app_country] => US
[patent_app_date] => 2007-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2258
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0174/20080174358.pdf
[firstpage_image] =>[orig_patent_app_number] => 11984776
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/984776 | Control circuit of P-type power transistor | Nov 20, 2007 | Abandoned |
Array
(
[id] => 5507258
[patent_doc_number] => 20090080465
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-26
[patent_title] => 'MULTIPLEXER CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/943074
[patent_app_country] => US
[patent_app_date] => 2007-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4473
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0080/20090080465.pdf
[firstpage_image] =>[orig_patent_app_number] => 11943074
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/943074 | Multiplexer circuit | Nov 19, 2007 | Issued |
Array
(
[id] => 236701
[patent_doc_number] => 07595683
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-09-29
[patent_title] => 'Low-input-voltage charge pump'
[patent_app_type] => utility
[patent_app_number] => 11/985457
[patent_app_country] => US
[patent_app_date] => 2007-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4678
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/595/07595683.pdf
[firstpage_image] =>[orig_patent_app_number] => 11985457
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/985457 | Low-input-voltage charge pump | Nov 14, 2007 | Issued |
Array
(
[id] => 5914
[patent_doc_number] => 07812648
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-12
[patent_title] => 'Frequency divider'
[patent_app_type] => utility
[patent_app_number] => 11/936008
[patent_app_country] => US
[patent_app_date] => 2007-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 39
[patent_no_of_words] => 9487
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/812/07812648.pdf
[firstpage_image] =>[orig_patent_app_number] => 11936008
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/936008 | Frequency divider | Nov 5, 2007 | Issued |
| 11/574327 | Device and Method for Comparing Two Supply Voltages | Nov 4, 2007 | Abandoned |
Array
(
[id] => 5328408
[patent_doc_number] => 20090108885
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-30
[patent_title] => 'Design structure for CMOS differential rail-to-rail latch circuits'
[patent_app_type] => utility
[patent_app_number] => 11/982206
[patent_app_country] => US
[patent_app_date] => 2007-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4708
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0108/20090108885.pdf
[firstpage_image] =>[orig_patent_app_number] => 11982206
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/982206 | Design structure for CMOS differential rail-to-rail latch circuits | Oct 30, 2007 | Abandoned |
Array
(
[id] => 4458129
[patent_doc_number] => 07893742
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-22
[patent_title] => 'Clock signal dividing circuit'
[patent_app_type] => utility
[patent_app_number] => 12/514115
[patent_app_country] => US
[patent_app_date] => 2007-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 9853
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/893/07893742.pdf
[firstpage_image] =>[orig_patent_app_number] => 12514115
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/514115 | Clock signal dividing circuit | Oct 25, 2007 | Issued |
Array
(
[id] => 373828
[patent_doc_number] => 07474134
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-06
[patent_title] => 'Radiation hardened programmable phase frequency divider'
[patent_app_type] => utility
[patent_app_number] => 11/923900
[patent_app_country] => US
[patent_app_date] => 2007-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5543
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/474/07474134.pdf
[firstpage_image] =>[orig_patent_app_number] => 11923900
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/923900 | Radiation hardened programmable phase frequency divider | Oct 24, 2007 | Issued |
Array
(
[id] => 75742
[patent_doc_number] => 07750730
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-07-06
[patent_title] => 'Bandpass filter circuit'
[patent_app_type] => utility
[patent_app_number] => 11/976348
[patent_app_country] => US
[patent_app_date] => 2007-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2773
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/750/07750730.pdf
[firstpage_image] =>[orig_patent_app_number] => 11976348
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/976348 | Bandpass filter circuit | Oct 23, 2007 | Issued |
Array
(
[id] => 44033
[patent_doc_number] => 07782096
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-08-24
[patent_title] => 'Track-and-hold circuit with low distortion'
[patent_app_type] => utility
[patent_app_number] => 11/876943
[patent_app_country] => US
[patent_app_date] => 2007-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3325
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/782/07782096.pdf
[firstpage_image] =>[orig_patent_app_number] => 11876943
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/876943 | Track-and-hold circuit with low distortion | Oct 22, 2007 | Issued |
Array
(
[id] => 4913530
[patent_doc_number] => 20080094129
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-24
[patent_title] => 'Voltage-booster power supply circuit'
[patent_app_type] => utility
[patent_app_number] => 11/907897
[patent_app_country] => US
[patent_app_date] => 2007-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 10215
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0094/20080094129.pdf
[firstpage_image] =>[orig_patent_app_number] => 11907897
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/907897 | Voltage-booster power supply circuit | Oct 17, 2007 | Issued |