Search

Hai L Nguyen

Examiner (ID: 11556, Phone: (571)272-1747 , Office: P/2842 )

Most Active Art Unit
2842
Art Unit(s)
2816, 2842
Total Applications
2250
Issued Applications
1990
Pending Applications
71
Abandoned Applications
221

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4913453 [patent_doc_number] => 20080094052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'Voltage detector circuit' [patent_app_type] => utility [patent_app_number] => 11/975097 [patent_app_country] => US [patent_app_date] => 2007-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10016 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094052.pdf [firstpage_image] =>[orig_patent_app_number] => 11975097 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/975097
Voltage detector circuit Oct 15, 2007 Issued
Array ( [id] => 4655306 [patent_doc_number] => 20080024167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'DESIGN STRUCTURE FOR IMPROVED DELAY VOLTAGE LEVEL SHIFTING FOR LARGE VOLTAGE DIFFERENTIALS' [patent_app_type] => utility [patent_app_number] => 11/869071 [patent_app_country] => US [patent_app_date] => 2007-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3848 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20080024167.pdf [firstpage_image] =>[orig_patent_app_number] => 11869071 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/869071
DESIGN STRUCTURE FOR IMPROVED DELAY VOLTAGE LEVEL SHIFTING FOR LARGE VOLTAGE DIFFERENTIALS Oct 8, 2007 Abandoned
Array ( [id] => 4923883 [patent_doc_number] => 20080072200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'Method and Radiation Hardened Phase Frequency Detector for Implementing Enhanced Radiation Immunity Performance' [patent_app_type] => utility [patent_app_number] => 11/869316 [patent_app_country] => US [patent_app_date] => 2007-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4460 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20080072200.pdf [firstpage_image] =>[orig_patent_app_number] => 11869316 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/869316
Method and Radiation Hardened Phase Frequency Detector for Implementing Enhanced Radiation Immunity Performance Oct 8, 2007 Abandoned
Array ( [id] => 4691461 [patent_doc_number] => 20080084231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-10 [patent_title] => 'Method for Implementing Level Shifter Circuits and Low Power Level Shifter Circuits for Integrated Circuits' [patent_app_type] => utility [patent_app_number] => 11/867108 [patent_app_country] => US [patent_app_date] => 2007-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4881 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20080084231.pdf [firstpage_image] =>[orig_patent_app_number] => 11867108 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/867108
Method for Implementing Level Shifter Circuits and Low Power Level Shifter Circuits for Integrated Circuits Oct 3, 2007 Abandoned
Array ( [id] => 4884444 [patent_doc_number] => 20080258776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'ANALOG SIGNAL TRANSMISSION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/866856 [patent_app_country] => US [patent_app_date] => 2007-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5665 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20080258776.pdf [firstpage_image] =>[orig_patent_app_number] => 11866856 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/866856
ANALOG SIGNAL TRANSMISSION CIRCUIT Oct 2, 2007 Abandoned
Array ( [id] => 4566613 [patent_doc_number] => 07839202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Bandgap reference circuit with reduced power consumption' [patent_app_type] => utility [patent_app_number] => 11/866120 [patent_app_country] => US [patent_app_date] => 2007-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3222 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/839/07839202.pdf [firstpage_image] =>[orig_patent_app_number] => 11866120 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/866120
Bandgap reference circuit with reduced power consumption Oct 1, 2007 Issued
Array ( [id] => 4913527 [patent_doc_number] => 20080094126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'BUFFER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/866404 [patent_app_country] => US [patent_app_date] => 2007-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5730 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094126.pdf [firstpage_image] =>[orig_patent_app_number] => 11866404 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/866404
Buffer circuit Oct 1, 2007 Issued
Array ( [id] => 133147 [patent_doc_number] => 07701279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-20 [patent_title] => 'Driving circuit for an emitter-switching configuration' [patent_app_type] => utility [patent_app_number] => 11/906368 [patent_app_country] => US [patent_app_date] => 2007-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 4394 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/701/07701279.pdf [firstpage_image] =>[orig_patent_app_number] => 11906368 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/906368
Driving circuit for an emitter-switching configuration Sep 30, 2007 Issued
Array ( [id] => 4566457 [patent_doc_number] => 07839184 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Multi-purpose current driver system and method' [patent_app_type] => utility [patent_app_number] => 11/865428 [patent_app_country] => US [patent_app_date] => 2007-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4583 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/839/07839184.pdf [firstpage_image] =>[orig_patent_app_number] => 11865428 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/865428
Multi-purpose current driver system and method Sep 30, 2007 Issued
Array ( [id] => 212056 [patent_doc_number] => 07622963 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'General purpose comparator with multiplexer inputs' [patent_app_type] => utility [patent_app_number] => 11/865651 [patent_app_country] => US [patent_app_date] => 2007-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 37 [patent_no_of_words] => 21110 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/622/07622963.pdf [firstpage_image] =>[orig_patent_app_number] => 11865651 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/865651
General purpose comparator with multiplexer inputs Sep 30, 2007 Issued
Array ( [id] => 83247 [patent_doc_number] => 07746135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Wake-up circuit' [patent_app_type] => utility [patent_app_number] => 11/864923 [patent_app_country] => US [patent_app_date] => 2007-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2275 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/746/07746135.pdf [firstpage_image] =>[orig_patent_app_number] => 11864923 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/864923
Wake-up circuit Sep 28, 2007 Issued
Array ( [id] => 5426313 [patent_doc_number] => 20090085623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'BIAS SIGNAL DELIVERY' [patent_app_type] => utility [patent_app_number] => 11/864921 [patent_app_country] => US [patent_app_date] => 2007-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2313 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20090085623.pdf [firstpage_image] =>[orig_patent_app_number] => 11864921 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/864921
Bias signal delivery Sep 28, 2007 Issued
Array ( [id] => 271055 [patent_doc_number] => 07564292 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-21 [patent_title] => 'Device and method for limiting Di/Dt caused by a switching FET of an inductive switching circuit' [patent_app_type] => utility [patent_app_number] => 11/864686 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 5057 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/564/07564292.pdf [firstpage_image] =>[orig_patent_app_number] => 11864686 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/864686
Device and method for limiting Di/Dt caused by a switching FET of an inductive switching circuit Sep 27, 2007 Issued
Array ( [id] => 163614 [patent_doc_number] => 07671653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'Dual edge triggered flip flops' [patent_app_type] => utility [patent_app_number] => 11/864504 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 5717 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/671/07671653.pdf [firstpage_image] =>[orig_patent_app_number] => 11864504 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/864504
Dual edge triggered flip flops Sep 27, 2007 Issued
Array ( [id] => 4686081 [patent_doc_number] => 20080030262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-07 [patent_title] => 'Circuit Arrangement And Method For Generating A Square Wave Signal' [patent_app_type] => utility [patent_app_number] => 11/863740 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2512 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20080030262.pdf [firstpage_image] =>[orig_patent_app_number] => 11863740 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/863740
Circuit arrangement and method for generating a square wave signal Sep 27, 2007 Issued
Array ( [id] => 5426307 [patent_doc_number] => 20090085617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'RAMP VOLTAGE CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/862210 [patent_app_country] => US [patent_app_date] => 2007-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2737 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20090085617.pdf [firstpage_image] =>[orig_patent_app_number] => 11862210 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/862210
RAMP VOLTAGE CIRCUIT Sep 26, 2007 Abandoned
Array ( [id] => 292885 [patent_doc_number] => 07545180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Sense amplifier providing low capacitance with reduced resolution time' [patent_app_type] => utility [patent_app_number] => 11/861924 [patent_app_country] => US [patent_app_date] => 2007-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3840 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/545/07545180.pdf [firstpage_image] =>[orig_patent_app_number] => 11861924 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/861924
Sense amplifier providing low capacitance with reduced resolution time Sep 25, 2007 Issued
Array ( [id] => 4737672 [patent_doc_number] => 20080231324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-25 [patent_title] => 'PHASE FREQUENCY DETECTOR AND PHASE-LOCKED LOOP' [patent_app_type] => utility [patent_app_number] => 11/861505 [patent_app_country] => US [patent_app_date] => 2007-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4871 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20080231324.pdf [firstpage_image] =>[orig_patent_app_number] => 11861505 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/861505
Phase frequency detector and phase-locked loop Sep 25, 2007 Issued
Array ( [id] => 278550 [patent_doc_number] => 07557628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-07 [patent_title] => 'Method and apparatus for digital phase generation at high frequencies' [patent_app_type] => utility [patent_app_number] => 11/860691 [patent_app_country] => US [patent_app_date] => 2007-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 7899 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/557/07557628.pdf [firstpage_image] =>[orig_patent_app_number] => 11860691 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/860691
Method and apparatus for digital phase generation at high frequencies Sep 24, 2007 Issued
Array ( [id] => 315378 [patent_doc_number] => 07525351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-28 [patent_title] => 'Fixed frequency clock output having a variable high frequency input clock and an unrelated fixed frequency reference signal' [patent_app_type] => utility [patent_app_number] => 11/851432 [patent_app_country] => US [patent_app_date] => 2007-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2617 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/525/07525351.pdf [firstpage_image] =>[orig_patent_app_number] => 11851432 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/851432
Fixed frequency clock output having a variable high frequency input clock and an unrelated fixed frequency reference signal Sep 6, 2007 Issued
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