Search

Hai Phan

Supervisory Patent Examiner (ID: 6233, Phone: (571)272-6338 , Office: P/2685 )

Most Active Art Unit
2614
Art Unit(s)
2654, 2685, 2614, 2734
Total Applications
530
Issued Applications
277
Pending Applications
96
Abandoned Applications
160

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6595463 [patent_doc_number] => 20020042199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-11 [patent_title] => 'Polishing by CMP for optimized planarization' [patent_app_type] => new [patent_app_number] => 09/956680 [patent_app_country] => US [patent_app_date] => 2001-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2580 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20020042199.pdf [firstpage_image] =>[orig_patent_app_number] => 09956680 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/956680
Polishing by CMP for optimized planarization Sep 19, 2001 Abandoned
Array ( [id] => 6838935 [patent_doc_number] => 20030036275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'METHOD FOR FORMING INTEGRATED CIRCUIT HAVING MONOS DEVICE AND MIXED-SIGNAL CIRCUIT' [patent_app_type] => new [patent_app_number] => 09/930998 [patent_app_country] => US [patent_app_date] => 2001-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3127 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20030036275.pdf [firstpage_image] =>[orig_patent_app_number] => 09930998 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/930998
Method for forming integrated circuit having MONOS device and mixed-signal circuit Aug 16, 2001 Issued
Array ( [id] => 6409417 [patent_doc_number] => 20020182864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Etching process' [patent_app_type] => new [patent_app_number] => 09/888846 [patent_app_country] => US [patent_app_date] => 2001-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2161 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20020182864.pdf [firstpage_image] =>[orig_patent_app_number] => 09888846 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/888846
Etching process Jun 24, 2001 Abandoned
Array ( [id] => 6894059 [patent_doc_number] => 20010016425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Semiconductor processing methods, methods of forming hemispherical grain polysilicon, methods of forming capacitors, and methods of forming wordlines' [patent_app_type] => new [patent_app_number] => 09/751213 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3134 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20010016425.pdf [firstpage_image] =>[orig_patent_app_number] => 09751213 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/751213
Semiconductor processing methods, methods of forming hemispherical grain polysilicon, methods of forming capacitors, and methods of forming wordlines Dec 28, 2000 Issued
Array ( [id] => 7026481 [patent_doc_number] => 20010013507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-16 [patent_title] => 'Method for CMP of low dielectric constant polymer layers' [patent_app_type] => new [patent_app_number] => 09/742853 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3641 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20010013507.pdf [firstpage_image] =>[orig_patent_app_number] => 09742853 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/742853
Method for CMP of low dielectric constant polymer layers Dec 20, 2000 Abandoned
Array ( [id] => 1532710 [patent_doc_number] => 06410449 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Method of processing a workpiece using an externally excited torroidal plasma source' [patent_app_type] => B1 [patent_app_number] => 09/636436 [patent_app_country] => US [patent_app_date] => 2000-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 46 [patent_no_of_words] => 10614 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/410/06410449.pdf [firstpage_image] =>[orig_patent_app_number] => 09636436 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/636436
Method of processing a workpiece using an externally excited torroidal plasma source Aug 10, 2000 Issued
Array ( [id] => 1474663 [patent_doc_number] => 06387808 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Method of correcting topographical effects on a micro-electronic substrate' [patent_app_type] => B1 [patent_app_number] => 09/620896 [patent_app_country] => US [patent_app_date] => 2000-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 20 [patent_no_of_words] => 3113 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/387/06387808.pdf [firstpage_image] =>[orig_patent_app_number] => 09620896 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/620896
Method of correcting topographical effects on a micro-electronic substrate Jul 20, 2000 Issued
Array ( [id] => 1536192 [patent_doc_number] => 06337277 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-08 [patent_title] => 'Clean chemistry low-k organic polymer etch' [patent_app_type] => B1 [patent_app_number] => 09/606842 [patent_app_country] => US [patent_app_date] => 2000-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8303 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/337/06337277.pdf [firstpage_image] =>[orig_patent_app_number] => 09606842 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/606842
Clean chemistry low-k organic polymer etch Jun 27, 2000 Issued
Array ( [id] => 1503679 [patent_doc_number] => 06465352 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Method for removing dry-etching residue in a semiconductor device fabricating process' [patent_app_type] => B1 [patent_app_number] => 09/592523 [patent_app_country] => US [patent_app_date] => 2000-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 29 [patent_no_of_words] => 6837 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/465/06465352.pdf [firstpage_image] =>[orig_patent_app_number] => 09592523 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/592523
Method for removing dry-etching residue in a semiconductor device fabricating process Jun 11, 2000 Issued
Array ( [id] => 1367878 [patent_doc_number] => 06566264 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-20 [patent_title] => 'Method for forming an opening in a semiconductor device substrate' [patent_app_type] => B1 [patent_app_number] => 09/583970 [patent_app_country] => US [patent_app_date] => 2000-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4274 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/566/06566264.pdf [firstpage_image] =>[orig_patent_app_number] => 09583970 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/583970
Method for forming an opening in a semiconductor device substrate May 30, 2000 Issued
Array ( [id] => 1440137 [patent_doc_number] => 06495462 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Components with releasable leads' [patent_app_type] => B1 [patent_app_number] => 09/566273 [patent_app_country] => US [patent_app_date] => 2000-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 11817 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/495/06495462.pdf [firstpage_image] =>[orig_patent_app_number] => 09566273 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/566273
Components with releasable leads May 4, 2000 Issued
Array ( [id] => 1486632 [patent_doc_number] => 06428721 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Polishing composition and polishing method employing it' [patent_app_type] => B1 [patent_app_number] => 09/564546 [patent_app_country] => US [patent_app_date] => 2000-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4839 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/428/06428721.pdf [firstpage_image] =>[orig_patent_app_number] => 09564546 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/564546
Polishing composition and polishing method employing it May 3, 2000 Issued
Array ( [id] => 1503674 [patent_doc_number] => 06465351 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Method of forming a capacitor lower electrode using a CMP stopping layer' [patent_app_type] => B1 [patent_app_number] => 09/563716 [patent_app_country] => US [patent_app_date] => 2000-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5917 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/465/06465351.pdf [firstpage_image] =>[orig_patent_app_number] => 09563716 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/563716
Method of forming a capacitor lower electrode using a CMP stopping layer May 1, 2000 Issued
Array ( [id] => 1570328 [patent_doc_number] => 06498107 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-24 [patent_title] => 'Interface control for film deposition by gas-cluster ion-beam processing' [patent_app_type] => B1 [patent_app_number] => 09/563035 [patent_app_country] => US [patent_app_date] => 2000-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 6121 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/498/06498107.pdf [firstpage_image] =>[orig_patent_app_number] => 09563035 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/563035
Interface control for film deposition by gas-cluster ion-beam processing Apr 30, 2000 Issued
Array ( [id] => 1446660 [patent_doc_number] => 06368968 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Ditch type floating ring for chemical mechanical polishing' [patent_app_type] => B1 [patent_app_number] => 09/547236 [patent_app_country] => US [patent_app_date] => 2000-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3274 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/368/06368968.pdf [firstpage_image] =>[orig_patent_app_number] => 09547236 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/547236
Ditch type floating ring for chemical mechanical polishing Apr 10, 2000 Issued
Array ( [id] => 1566097 [patent_doc_number] => 06376377 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Post chemical mechanical polish (CMP) planarizing substrate cleaning method employing enhanced substrate hydrophilicity' [patent_app_type] => B1 [patent_app_number] => 09/541487 [patent_app_country] => US [patent_app_date] => 2000-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 6205 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/376/06376377.pdf [firstpage_image] =>[orig_patent_app_number] => 09541487 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/541487
Post chemical mechanical polish (CMP) planarizing substrate cleaning method employing enhanced substrate hydrophilicity Apr 2, 2000 Issued
Array ( [id] => 6473766 [patent_doc_number] => 20020022281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Convertible hot edge ring to improve low-k dielectric etch' [patent_app_type] => new [patent_app_number] => 09/502864 [patent_app_country] => US [patent_app_date] => 2000-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7359 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20020022281.pdf [firstpage_image] =>[orig_patent_app_number] => 09502864 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/502864
Convertible hot edge ring to improve low-K dielectric etch Feb 10, 2000 Issued
Array ( [id] => 1340110 [patent_doc_number] => 06589870 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'Inter-layer connection structure, multilayer printed circuit board and production processes therefor' [patent_app_type] => B1 [patent_app_number] => 09/498222 [patent_app_country] => US [patent_app_date] => 2000-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 32 [patent_no_of_words] => 4379 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/589/06589870.pdf [firstpage_image] =>[orig_patent_app_number] => 09498222 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/498222
Inter-layer connection structure, multilayer printed circuit board and production processes therefor Feb 3, 2000 Issued
Array ( [id] => 1347489 [patent_doc_number] => 06579797 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Cleaning brush conditioning apparatus' [patent_app_type] => B1 [patent_app_number] => 09/490912 [patent_app_country] => US [patent_app_date] => 2000-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2308 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/579/06579797.pdf [firstpage_image] =>[orig_patent_app_number] => 09490912 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/490912
Cleaning brush conditioning apparatus Jan 24, 2000 Issued
Array ( [id] => 4304347 [patent_doc_number] => 06326307 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Plasma pretreatment of photoresist in an oxide etch process' [patent_app_type] => 1 [patent_app_number] => 9/440792 [patent_app_country] => US [patent_app_date] => 1999-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5368 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326307.pdf [firstpage_image] =>[orig_patent_app_number] => 440792 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/440792
Plasma pretreatment of photoresist in an oxide etch process Nov 14, 1999 Issued
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