Hai Phan

Array ( [id] => 3439420 [patent_doc_number] => 05463663 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-31 [patent_title] => 'Controlling synchronization in a system having a plurality of units when a unit is disconnected from or connected to the system that is active' [patent_app_type] => 1 [patent_app_number] => 8/189056 [patent_app_country] => US [patent_app_date] => 1994-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 6530 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/463/05463663.pdf [firstpage_image] =>[orig_patent_app_number] => 189056 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3502629 [patent_doc_number] => 05471673 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-28 [patent_title] => 'Multiple RF carrier synthesizer' [patent_app_type] => 1 [patent_app_number] => 8/188019 [patent_app_country] => US [patent_app_date] => 1994-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2045 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/471/05471673.pdf [firstpage_image] =>[orig_patent_app_number] => 188019 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3610048 [patent_doc_number] => 05559833 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-24 [patent_title] => 'Transmission system comprising timing recovery' [patent_app_type] => 1 [patent_app_number] => 8/184626 [patent_app_country] => US [patent_app_date] => 1994-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2155 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/559/05559833.pdf [firstpage_image] =>[orig_patent_app_number] => 184626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3486797 [patent_doc_number] => 05432823 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-11 [patent_title] => 'Method and circuitry for minimizing clock-data skew in a bus system' [patent_app_type] => 1 [patent_app_number] => 8/178601 [patent_app_country] => US [patent_app_date] => 1994-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5455 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/432/05432823.pdf [firstpage_image] =>[orig_patent_app_number] => 178601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3136843 [patent_doc_number] => 05436932 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-25 [patent_title] => 'For performing amplitude-phase demodulation and viterbi decoding' [patent_app_type] => 1 [patent_app_number] => 8/175266 [patent_app_country] => US [patent_app_date] => 1993-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 5018 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/436/05436932.pdf [firstpage_image] =>[orig_patent_app_number] => 175266 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3517701 [patent_doc_number] => 05570397 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'Redundant synchronized clock controller' [patent_app_type] => 1 [patent_app_number] => 8/173446 [patent_app_country] => US [patent_app_date] => 1993-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 7829 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/570/05570397.pdf [firstpage_image] =>[orig_patent_app_number] => 173446 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3429724 [patent_doc_number] => 05479450 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-26 [patent_title] => 'Digital data demodulating apparatus' [patent_app_type] => 1 [patent_app_number] => 8/172256 [patent_app_country] => US [patent_app_date] => 1993-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5097 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/479/05479450.pdf [firstpage_image] =>[orig_patent_app_number] => 172256 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3528205 [patent_doc_number] => 05506875 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-09 [patent_title] => 'Method and apparatus for performing frequency acquisition in all digital phase lock loop' [patent_app_type] => 1 [patent_app_number] => 8/165686 [patent_app_country] => US [patent_app_date] => 1993-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2965 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/506/05506875.pdf [firstpage_image] =>[orig_patent_app_number] => 165686 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3505912 [patent_doc_number] => 05509037 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-16 [patent_title] => 'Data phase alignment circuitry' [patent_app_type] => 1 [patent_app_number] => 8/161906 [patent_app_country] => US [patent_app_date] => 1993-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5835 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/509/05509037.pdf [firstpage_image] =>[orig_patent_app_number] => 161906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3493755 [patent_doc_number] => 05446768 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-29 [patent_title] => 'Configuration detection apparatus for data link' [patent_app_type] => 1 [patent_app_number] => 8/159036 [patent_app_country] => US [patent_app_date] => 1993-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5785 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/446/05446768.pdf [firstpage_image] =>[orig_patent_app_number] => 159036 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3601467 [patent_doc_number] => 05586150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-17 [patent_title] => 'Method and apparatus for symbol synchronization in multi-level digital FM radio' [patent_app_type] => 1 [patent_app_number] => 8/157996 [patent_app_country] => US [patent_app_date] => 1993-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2970 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/586/05586150.pdf [firstpage_image] =>[orig_patent_app_number] => 157996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3439437 [patent_doc_number] => 05463664 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-31 [patent_title] => 'DQPSK delay detection circuit that produces stable clock signal in response to both I and Q signals' [patent_app_type] => 1 [patent_app_number] => 8/156336 [patent_app_country] => US [patent_app_date] => 1993-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3407 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/463/05463664.pdf [firstpage_image] =>[orig_patent_app_number] => 156336 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3126874 [patent_doc_number] => 05410571 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-25 [patent_title] => 'PLL frequency synthesizer circuit' [patent_app_type] => 1 [patent_app_number] => 8/121546 [patent_app_country] => US [patent_app_date] => 1993-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 9028 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 420 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/410/05410571.pdf [firstpage_image] =>[orig_patent_app_number] => 121546 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3136898 [patent_doc_number] => 05436935 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-25 [patent_title] => 'Process for synchronizing a receiver switching circuit to a received signal containing a pn-code-spread data signal' [patent_app_type] => 1 [patent_app_number] => 8/119546 [patent_app_country] => US [patent_app_date] => 1993-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3779 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 509 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/436/05436935.pdf [firstpage_image] =>[orig_patent_app_number] => 119546 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3130806 [patent_doc_number] => 05450457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-12 [patent_title] => 'Sampling phase extracting circuit' [patent_app_type] => 1 [patent_app_number] => 8/119396 [patent_app_country] => US [patent_app_date] => 1993-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2990 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/450/05450457.pdf [firstpage_image] =>[orig_patent_app_number] => 119396 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3467772 [patent_doc_number] => 05402446 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-28 [patent_title] => 'FSK receiver having a PLL local oscillator operable in intermittent operation in accordance with its phase locked state' [patent_app_type] => 1 [patent_app_number] => 8/119676 [patent_app_country] => US [patent_app_date] => 1993-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4068 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 492 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/402/05402446.pdf [firstpage_image] =>[orig_patent_app_number] => 119676 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3493600 [patent_doc_number] => 05446759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-29 [patent_title] => 'Information transmission system and method of operation' [patent_app_type] => 1 [patent_app_number] => 8/112256 [patent_app_country] => US [patent_app_date] => 1993-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 59 [patent_no_of_words] => 57824 [patent_no_of_claims] => 235 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/446/05446759.pdf [firstpage_image] =>[orig_patent_app_number] => 112256 [rel_patent_id] =>[rel_patent_doc_number] =>)