Search

Hai Phan

Examiner (ID: 15555)

Most Active Art Unit
2614
Art Unit(s)
2734, 2685, 2654, 2614
Total Applications
532
Issued Applications
277
Pending Applications
99
Abandoned Applications
159

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19267697 [patent_doc_number] => 20240211400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => DISAGGREGATING A MEMORY SIDE CACHE DATA ARRAY AND CACHE CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/069249 [patent_app_country] => US [patent_app_date] => 2022-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18069249 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/069249
DISAGGREGATING A MEMORY SIDE CACHE DATA ARRAY AND CACHE CONTROLLER Dec 20, 2022 Pending
Array ( [id] => 19235676 [patent_doc_number] => 20240192871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => SPEEDING CACHE SCANS WITH A BYTEMAP OF ACTIVE TRACKS WITH ENCODED BITS [patent_app_type] => utility [patent_app_number] => 18/065054 [patent_app_country] => US [patent_app_date] => 2022-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18065054 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/065054
Speeding cache scans with a bytemap of active tracks with encoded bits Dec 12, 2022 Issued
Array ( [id] => 18965811 [patent_doc_number] => 11899575 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-02-13 [patent_title] => Flash memory system with address-based subdivision selection by host and metadata management in storage drive [patent_app_type] => utility [patent_app_number] => 18/073487 [patent_app_country] => US [patent_app_date] => 2022-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 27594 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18073487 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/073487
Flash memory system with address-based subdivision selection by host and metadata management in storage drive Nov 30, 2022 Issued
Array ( [id] => 18803210 [patent_doc_number] => 11836368 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Lossy data compression [patent_app_type] => utility [patent_app_number] => 18/071454 [patent_app_country] => US [patent_app_date] => 2022-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18071454 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/071454
Lossy data compression Nov 28, 2022 Issued
Array ( [id] => 20563940 [patent_doc_number] => 12566547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-03 [patent_title] => Hybrid design for large scale block device compression using flat hash table [patent_app_type] => utility [patent_app_number] => 18/056842 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7556 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18056842 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/056842
Hybrid design for large scale block device compression using flat hash table Nov 17, 2022 Issued
Array ( [id] => 18348163 [patent_doc_number] => 20230136274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => Ceph Media Failure and Remediation [patent_app_type] => utility [patent_app_number] => 17/979851 [patent_app_country] => US [patent_app_date] => 2022-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17979851 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/979851
Ceph Media Failure and Remediation Nov 2, 2022 Abandoned
Array ( [id] => 18531660 [patent_doc_number] => 20230236732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/975250 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17975250 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/975250
MEMORY DEVICE Oct 26, 2022 Pending
Array ( [id] => 18911775 [patent_doc_number] => 11874753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Log compression [patent_app_type] => utility [patent_app_number] => 17/967474 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 10644 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17967474 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/967474
Log compression Oct 16, 2022 Issued
Array ( [id] => 19566699 [patent_doc_number] => 12141471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Storage device and operating method utilizing a buffer when a write failure occurs [patent_app_type] => utility [patent_app_number] => 17/957075 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8826 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17957075 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/957075
Storage device and operating method utilizing a buffer when a write failure occurs Sep 29, 2022 Issued
Array ( [id] => 20454616 [patent_doc_number] => 12517669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => Scheduling processing-in-memory requests and memory requests [patent_app_type] => utility [patent_app_number] => 17/954784 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2635 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17954784 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/954784
Scheduling processing-in-memory requests and memory requests Sep 27, 2022 Issued
Array ( [id] => 19228622 [patent_doc_number] => 12008259 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-06-11 [patent_title] => Data processing and transmission using hardware serialization and deserialization functions [patent_app_type] => utility [patent_app_number] => 17/955324 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955324 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955324
Data processing and transmission using hardware serialization and deserialization functions Sep 27, 2022 Issued
Array ( [id] => 18499127 [patent_doc_number] => 20230221868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => METHOD FOR INHERITING DEFECT BLOCK TABLE AND STORAGE DEVICE THEREOF [patent_app_type] => utility [patent_app_number] => 17/932309 [patent_app_country] => US [patent_app_date] => 2022-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17932309 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/932309
Method for inheriting defect block table and storage device thereof Sep 14, 2022 Issued
Array ( [id] => 18267158 [patent_doc_number] => 20230088400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => CONTROL MODULE AND CONTROL METHOD THEREOF FOR SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 17/932507 [patent_app_country] => US [patent_app_date] => 2022-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17932507 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/932507
CONTROL MODULE AND CONTROL METHOD THEREOF FOR SYNCHRONOUS DYNAMIC RANDOM ACCESS MEMORY Sep 14, 2022 Abandoned
Array ( [id] => 18111451 [patent_doc_number] => 20230004331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => NAND RAID CONTROLLER [patent_app_type] => utility [patent_app_number] => 17/902909 [patent_app_country] => US [patent_app_date] => 2022-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10391 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17902909 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/902909
NAND RAID CONTROLLER Sep 4, 2022 Abandoned
Array ( [id] => 19005736 [patent_doc_number] => 20240069807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => MANAGING COMMAND COMPLETION NOTIFICATION PACING IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 17/900122 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10939 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17900122 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/900122
Managing command completion notification pacing in a memory sub-system Aug 30, 2022 Issued
Array ( [id] => 19639040 [patent_doc_number] => 12169648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Caching for multiple-level memory device [patent_app_type] => utility [patent_app_number] => 17/888325 [patent_app_country] => US [patent_app_date] => 2022-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 17016 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17888325 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/888325
Caching for multiple-level memory device Aug 14, 2022 Issued
Array ( [id] => 18377881 [patent_doc_number] => 20230152968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => STORAGE DEVICES INCLUDING NON-VOLATILE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/884689 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884689 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884689
Data management system using bitmap based trim command Aug 9, 2022 Issued
Array ( [id] => 18519848 [patent_doc_number] => 11709739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Block-level single instancing [patent_app_type] => utility [patent_app_number] => 17/884482 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 15403 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884482 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884482
Block-level single instancing Aug 8, 2022 Issued
Array ( [id] => 18925218 [patent_doc_number] => 20240028222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SLEEP MODE USING SHARED MEMORY BETWEEN TWO PROCESSORS OF AN INFORMATION HANDLING SYSTEM [patent_app_type] => utility [patent_app_number] => 17/814458 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7097 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814458 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814458
SLEEP MODE USING SHARED MEMORY BETWEEN TWO PROCESSORS OF AN INFORMATION HANDLING SYSTEM Jul 21, 2022 Abandoned
Array ( [id] => 18342782 [patent_doc_number] => 11640260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-02 [patent_title] => Fast garbage collection in zoned namespaces SSDs [patent_app_type] => utility [patent_app_number] => 17/869951 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9056 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869951 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869951
Fast garbage collection in zoned namespaces SSDs Jul 20, 2022 Issued
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