Search

Hai Vo

Examiner (ID: 8641, Phone: (571)272-1485 , Office: P/1788 )

Most Active Art Unit
1788
Art Unit(s)
1787, 1751, 1759, 1771, 1794, 1788
Total Applications
1959
Issued Applications
974
Pending Applications
179
Abandoned Applications
825

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13214813 [patent_doc_number] => 10121782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-06 [patent_title] => 3D cross-point memory manufacturing process having limited lithography steps [patent_app_type] => utility [patent_app_number] => 15/629152 [patent_app_country] => US [patent_app_date] => 2017-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 30 [patent_no_of_words] => 4229 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15629152 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/629152
3D cross-point memory manufacturing process having limited lithography steps Jun 20, 2017 Issued
Array ( [id] => 11983751 [patent_doc_number] => 20170287906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => '3D CROSS-POINT MEMORY MANUFACTURING PROCESS HAVING LIMITED LITHOGRAPHY STEPS' [patent_app_type] => utility [patent_app_number] => 15/628317 [patent_app_country] => US [patent_app_date] => 2017-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4377 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15628317 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/628317
3D cross-point memory manufacturing process having limited lithography steps Jun 19, 2017 Issued
Array ( [id] => 15733693 [patent_doc_number] => 10615284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Thin film transistor and method for fabricating the same, display substrate, display apparatus [patent_app_type] => utility [patent_app_number] => 15/737031 [patent_app_country] => US [patent_app_date] => 2017-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 6645 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15737031 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/737031
Thin film transistor and method for fabricating the same, display substrate, display apparatus Jun 15, 2017 Issued
Array ( [id] => 15922291 [patent_doc_number] => 10658394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Array substrate and manufacturing method thereof, display panel and display device [patent_app_type] => utility [patent_app_number] => 15/737087 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6755 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15737087 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/737087
Array substrate and manufacturing method thereof, display panel and display device Jun 6, 2017 Issued
Array ( [id] => 15250457 [patent_doc_number] => 10510757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Semiconductor device including storage element [patent_app_type] => utility [patent_app_number] => 15/615873 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 55 [patent_no_of_words] => 24929 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15615873 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/615873
Semiconductor device including storage element Jun 6, 2017 Issued
Array ( [id] => 11952390 [patent_doc_number] => 20170256541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-07 [patent_title] => 'METHOD OF FORMING SUPER STEEP RETROGRADE WELLS ON FINFET' [patent_app_type] => utility [patent_app_number] => 15/599751 [patent_app_country] => US [patent_app_date] => 2017-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3120 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15599751 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/599751
METHOD OF FORMING SUPER STEEP RETROGRADE WELLS ON FINFET May 18, 2017 Abandoned
Array ( [id] => 13571155 [patent_doc_number] => 20180337125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH RESISTIVE ELEMENT [patent_app_type] => utility [patent_app_number] => 15/599687 [patent_app_country] => US [patent_app_date] => 2017-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15599687 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/599687
Semiconductor device structure with resistive element May 18, 2017 Issued
Array ( [id] => 16218738 [patent_doc_number] => 10734561 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Method of manufacturing wiring board, wiring board, and light emitting device using the wiring board [patent_app_type] => utility [patent_app_number] => 15/599555 [patent_app_country] => US [patent_app_date] => 2017-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 6038 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15599555 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/599555
Method of manufacturing wiring board, wiring board, and light emitting device using the wiring board May 18, 2017 Issued
Array ( [id] => 16356696 [patent_doc_number] => 10797214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Method of manufacturing wiring board, method of manufacturing light emitting device using the wiring board, wiring board, and light emitting device using the wiring board [patent_app_type] => utility [patent_app_number] => 15/599543 [patent_app_country] => US [patent_app_date] => 2017-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 6883 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15599543 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/599543
Method of manufacturing wiring board, method of manufacturing light emitting device using the wiring board, wiring board, and light emitting device using the wiring board May 18, 2017 Issued
Array ( [id] => 12114922 [patent_doc_number] => 09870916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-16 [patent_title] => 'LDMOS transistor' [patent_app_type] => utility [patent_app_number] => 15/597319 [patent_app_country] => US [patent_app_date] => 2017-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5872 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15597319 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/597319
LDMOS transistor May 16, 2017 Issued
Array ( [id] => 12350460 [patent_doc_number] => 09952324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => Time of flight (TOF) distance sensor [patent_app_type] => utility [patent_app_number] => 15/596293 [patent_app_country] => US [patent_app_date] => 2017-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3617 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15596293 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/596293
Time of flight (TOF) distance sensor May 15, 2017 Issued
Array ( [id] => 11945994 [patent_doc_number] => 20170250145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'PERFORATED CONDUCTIVE MATERIAL FOR EMI SHIELDING OF SEMICONDUCTOR DEVICE AND COMPONENTS' [patent_app_type] => utility [patent_app_number] => 15/595581 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4279 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15595581 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/595581
PERFORATED CONDUCTIVE MATERIAL FOR EMI SHIELDING OF SEMICONDUCTOR DEVICE AND COMPONENTS May 14, 2017 Abandoned
Array ( [id] => 12122629 [patent_doc_number] => 20180006215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'Methods for Manufacturing Magnetic Memory Devices' [patent_app_type] => utility [patent_app_number] => 15/588776 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8232 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15588776 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/588776
Methods for manufacturing magnetic memory devices May 7, 2017 Issued
Array ( [id] => 14700779 [patent_doc_number] => 10378124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Device including semiconductor substrate containing gallium nitride and method for producing the same [patent_app_type] => utility [patent_app_number] => 15/589016 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 50 [patent_no_of_words] => 13928 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15589016 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/589016
Device including semiconductor substrate containing gallium nitride and method for producing the same May 7, 2017 Issued
Array ( [id] => 14707013 [patent_doc_number] => 10381265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Method of manufacturing semiconductor device with interlayer insulating layers [patent_app_type] => utility [patent_app_number] => 15/589169 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 12115 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15589169 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/589169
Method of manufacturing semiconductor device with interlayer insulating layers May 7, 2017 Issued
Array ( [id] => 12054441 [patent_doc_number] => 20170330785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'SHEET, TAPE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/588996 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6569 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15588996 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/588996
SHEET, TAPE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE May 7, 2017 Abandoned
Array ( [id] => 12990403 [patent_doc_number] => 20170345878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/588901 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3076 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15588901 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/588901
Display device with self-illumination layer May 7, 2017 Issued
Array ( [id] => 11869644 [patent_doc_number] => 20170236929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'SEMICONDUCTOR DEVICE WITH SELECTIVELY ETCHED SURFACE PASSIVATION' [patent_app_type] => utility [patent_app_number] => 15/587276 [patent_app_country] => US [patent_app_date] => 2017-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10458 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15587276 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/587276
Semiconductor device with selectively etched surface passivation May 3, 2017 Issued
Array ( [id] => 16280182 [patent_doc_number] => 10763223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Substrate structure having chamfers [patent_app_type] => utility [patent_app_number] => 15/494034 [patent_app_country] => US [patent_app_date] => 2017-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 2767 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15494034 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/494034
Substrate structure having chamfers Apr 20, 2017 Issued
Array ( [id] => 11967162 [patent_doc_number] => 20170271315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'SEMICONDUCTOR DEVICE USING EMC WAFER SUPPORT SYSTEM AND FABRICATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/490091 [patent_app_country] => US [patent_app_date] => 2017-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3688 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15490091 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/490091
Semiconductor device using EMC wafer support system and fabricating method thereof Apr 17, 2017 Issued
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