
Hai Vo
Examiner (ID: 8641, Phone: (571)272-1485 , Office: P/1788 )
| Most Active Art Unit | 1788 |
| Art Unit(s) | 1787, 1751, 1759, 1771, 1794, 1788 |
| Total Applications | 1959 |
| Issued Applications | 974 |
| Pending Applications | 179 |
| Abandoned Applications | 825 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11057184
[patent_doc_number] => 20160254146
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-01
[patent_title] => 'Methods and structures for preparing single crystal silicon wafers for use as substrates for epitaxial growth of crack-free gallium nitride films and devices'
[patent_app_type] => utility
[patent_app_number] => 15/149190
[patent_app_country] => US
[patent_app_date] => 2016-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15149190
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/149190 | Methods and structures for preparing single crystal silicon wafers for use as substrates for epitaxial growth of crack-free gallium nitride films and devices | May 8, 2016 | Abandoned |
Array
(
[id] => 11503260
[patent_doc_number] => 20170077445
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-16
[patent_title] => 'DISPLAY APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 15/145012
[patent_app_country] => US
[patent_app_date] => 2016-05-03
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/145012 | DISPLAY APPARATUS | May 2, 2016 | Abandoned |
Array
(
[id] => 11891266
[patent_doc_number] => 09761837
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-09-12
[patent_title] => 'Method for manufacturing OLED devices'
[patent_app_type] => utility
[patent_app_number] => 15/143782
[patent_app_country] => US
[patent_app_date] => 2016-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15143782
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/143782 | Method for manufacturing OLED devices | May 1, 2016 | Issued |
Array
(
[id] => 12202543
[patent_doc_number] => 09905616
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-27
[patent_title] => 'Organic light-emitting device, method of fabricating the same, and organic light-emitting display apparatus including the device'
[patent_app_type] => utility
[patent_app_number] => 15/141910
[patent_app_country] => US
[patent_app_date] => 2016-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15141910
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/141910 | Organic light-emitting device, method of fabricating the same, and organic light-emitting display apparatus including the device | Apr 28, 2016 | Issued |
Array
(
[id] => 16332331
[patent_doc_number] => 20200303297
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-24
[patent_title] => HIGH DENSITY MULTIPLE DIE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 16/088340
[patent_app_country] => US
[patent_app_date] => 2016-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
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[patent_no_of_words] => 4180
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16088340
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/088340 | High density multiple die structure | Apr 26, 2016 | Issued |
Array
(
[id] => 11353828
[patent_doc_number] => 20160372567
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-22
[patent_title] => 'SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/134906
[patent_app_country] => US
[patent_app_date] => 2016-04-21
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134906
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/134906 | Semiconductor devices and methods of manufacturing the same | Apr 20, 2016 | Issued |
Array
(
[id] => 13769595
[patent_doc_number] => 10177147
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[patent_kind] => B2
[patent_issue_date] => 2019-01-08
[patent_title] => Semiconductor device and structure
[patent_app_type] => utility
[patent_app_number] => 15/134897
[patent_app_country] => US
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134897
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/134897 | Semiconductor device and structure | Apr 20, 2016 | Issued |
Array
(
[id] => 12005467
[patent_doc_number] => 20170309622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-26
[patent_title] => 'FORMING GATES WITH VARYING LENGTH USING SIDEWALL IMAGE TRANSFER'
[patent_app_type] => utility
[patent_app_number] => 15/134497
[patent_app_country] => US
[patent_app_date] => 2016-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134497
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/134497 | Forming gates with varying length using sidewall image transfer | Apr 20, 2016 | Issued |
Array
(
[id] => 11118067
[patent_doc_number] => 20160315040
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-27
[patent_title] => 'CORE FOR REVERSE REFLOW, SEMICONDUCTOR PACKAGE, AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 15/134848
[patent_app_country] => US
[patent_app_date] => 2016-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134848
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/134848 | CORE FOR REVERSE REFLOW, SEMICONDUCTOR PACKAGE, AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE | Apr 20, 2016 | Abandoned |
Array
(
[id] => 12229790
[patent_doc_number] => 09917039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-13
[patent_title] => 'Method of forming a semiconductor package with conductive interconnect frame and structure'
[patent_app_type] => utility
[patent_app_number] => 15/134330
[patent_app_country] => US
[patent_app_date] => 2016-04-20
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15134330
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/134330 | Method of forming a semiconductor package with conductive interconnect frame and structure | Apr 19, 2016 | Issued |
Array
(
[id] => 11036170
[patent_doc_number] => 20160233126
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-08-11
[patent_title] => 'SELECTIVE CONDUCTIVE BARRIER LAYER FORMATION'
[patent_app_type] => utility
[patent_app_number] => 15/133040
[patent_app_country] => US
[patent_app_date] => 2016-04-19
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15133040
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/133040 | SELECTIVE CONDUCTIVE BARRIER LAYER FORMATION | Apr 18, 2016 | Abandoned |
Array
(
[id] => 12953890
[patent_doc_number] => 09837441
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-12-05
[patent_title] => Display device including transistor and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 15/096663
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/096663 | Display device including transistor and manufacturing method thereof | Apr 11, 2016 | Issued |
Array
(
[id] => 11701734
[patent_doc_number] => 09691657
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-27
[patent_title] => 'Interconnect wires including relatively low resistivity cores'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/096609 | Interconnect wires including relatively low resistivity cores | Apr 11, 2016 | Issued |
Array
(
[id] => 14125659
[patent_doc_number] => 10249694
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-02
[patent_title] => Organic EL display device
[patent_app_type] => utility
[patent_app_number] => 15/566225
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/566225 | Organic EL display device | Apr 7, 2016 | Issued |
Array
(
[id] => 11847593
[patent_doc_number] => 09735151
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-08-15
[patent_title] => '3D cross-point memory device'
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[patent_app_number] => 15/080525
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15080525
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/080525 | 3D cross-point memory device | Mar 23, 2016 | Issued |
Array
(
[id] => 11847785
[patent_doc_number] => 09735345
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-15
[patent_title] => 'Vertical hall effect sensor'
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[patent_app_number] => 15/060791
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/060791 | Vertical hall effect sensor | Mar 3, 2016 | Issued |
Array
(
[id] => 10993309
[patent_doc_number] => 20160190255
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[patent_kind] => A1
[patent_issue_date] => 2016-06-30
[patent_title] => 'METHODS FOR FORMING FinFETS HAVING A CAPPING LAYER FOR REDUCING PUNCH THROUGH LEAKAGE'
[patent_app_type] => utility
[patent_app_number] => 15/060052
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/060052 | Methods for forming FinFETS having a capping layer for reducing punch through leakage | Mar 2, 2016 | Issued |
Array
(
[id] => 11932561
[patent_doc_number] => 09799564
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[patent_issue_date] => 2017-10-24
[patent_title] => 'Semiconductor structure having contact holes between sidewall spacers and fabrication method there of'
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/049761 | Method for manufacturing semiconductor device | Feb 21, 2016 | Issued |