Han Yang

Array ( [id] => 18423668 [patent_doc_number] => 20230178132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/870545 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19532840 [patent_doc_number] => 20240356742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => VERIFICATION OF SERVICE BASED ARCHITECTURE PARAMETERS [patent_app_type] => utility [patent_app_number] => 18/682787 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18682787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19229389 [patent_doc_number] => 12009030 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Content addressable memory cell [patent_app_type] => utility [patent_app_number] => 17/865720 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4983 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865720 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17984876 [patent_doc_number] => 20220350913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => UNSTRUCTURED DATA SENSITIVITY INFERENCE FOR FILE MOVEMENT TRACKING IN A NETWORK [patent_app_type] => utility [patent_app_number] => 17/860217 [patent_app_country] => US [patent_app_date] => 2022-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17860217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18009917 [patent_doc_number] => 20220368684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => Method, Device, and System for Anchor Key Generation and Management in a Communication Network for Encrypted Communication with Service Applications [patent_app_type] => utility [patent_app_number] => 17/858271 [patent_app_country] => US [patent_app_date] => 2022-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12332 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17858271 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18548016 [patent_doc_number] => 11721374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Control circuit of memory device [patent_app_type] => utility [patent_app_number] => 17/853401 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8074 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20304349 [patent_doc_number] => 12450342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Security subsystem for execution verification [patent_app_type] => utility [patent_app_number] => 17/852073 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7337 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17917230 [patent_doc_number] => 20220319626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SAFETY AND CORRECTNESS DATA READING IN NON-VOLATILE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/849398 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5101 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18637999 [patent_doc_number] => 11762599 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Self adapting iterative read calibration to retrieve data from memory cells [patent_app_type] => utility [patent_app_number] => 17/848292 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 10785 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848292 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18848527 [patent_doc_number] => 20230410931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => Magnetic Memory Device [patent_app_type] => utility [patent_app_number] => 17/807967 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17807967 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19494100 [patent_doc_number] => 12112821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Read destructive memory wear leveling system [patent_app_type] => utility [patent_app_number] => 17/845643 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 22270 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845643 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18848518 [patent_doc_number] => 20230410922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => REFRESH FREQUENCY-DEPENDENT SYSTEM-LEVEL TRIMMING OF VERIFY LEVEL OFFSETS FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/841343 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841343 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18067966 [patent_doc_number] => 20220399054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => NON-VOLATILE MEMORY CELL WITH MULTIPLE FERROELECTRIC MEMORY ELEMENTS (FMEs) [patent_app_type] => utility [patent_app_number] => 17/840779 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19427931 [patent_doc_number] => 12087359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Memory cell selector for high-voltage set and reset operations [patent_app_type] => utility [patent_app_number] => 17/838718 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8563 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17838718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18431428 [patent_doc_number] => 11676655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Semiconductor integrated circuit device and wearable device [patent_app_type] => utility [patent_app_number] => 17/837122 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 14465 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18067971 [patent_doc_number] => 20220399059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => MEMORY CIRCUIT, MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/806080 [patent_app_country] => US [patent_app_date] => 2022-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5924 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18874399 [patent_doc_number] => 11862220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 17/836228 [patent_app_country] => US [patent_app_date] => 2022-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7168 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17836228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19356718 [patent_doc_number] => 12057173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Page buffer circuit and memory device including the same [patent_app_type] => utility [patent_app_number] => 17/836453 [patent_app_country] => US [patent_app_date] => 2022-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13119 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17836453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19973180 [patent_doc_number] => 12341805 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-24 [patent_title] => Mitigation of malware code-distribution sites [patent_app_type] => utility [patent_app_number] => 17/833680 [patent_app_country] => US [patent_app_date] => 2022-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2165 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18061422 [patent_doc_number] => 20220392508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => MEMORY DEVICE BASED ON FERROELECTRIC CAPACITOR [patent_app_type] => utility [patent_app_number] => 17/831581 [patent_app_country] => US [patent_app_date] => 2022-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17831581 [rel_patent_id] =>[rel_patent_doc_number] =>)