Search

Han Yang

Examiner (ID: 5682, Phone: (571)270-3048 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2493, 2809, 2824
Total Applications
1497
Issued Applications
1383
Pending Applications
77
Abandoned Applications
77

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18415817 [patent_doc_number] => 11670362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Sub-word line driver placement for memory device [patent_app_type] => utility [patent_app_number] => 17/687272 [patent_app_country] => US [patent_app_date] => 2022-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17687272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/687272
Sub-word line driver placement for memory device Mar 3, 2022 Issued
Array ( [id] => 18766741 [patent_doc_number] => 11817148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Techniques for programming a memory cell [patent_app_type] => utility [patent_app_number] => 17/685219 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14430 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17685219 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/685219
Techniques for programming a memory cell Mar 1, 2022 Issued
Array ( [id] => 17886136 [patent_doc_number] => 20220301613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => DEVICE AND METHOD FOR PERFORMING MATRIX OPERATION [patent_app_type] => utility [patent_app_number] => 17/682526 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17682526 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/682526
Device and method for performing matrix operation Feb 27, 2022 Issued
Array ( [id] => 18599985 [patent_doc_number] => 20230274786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => APPARATUS AND METHODS FOR DETERMINING MEMORY CELL DATA STATES [patent_app_type] => utility [patent_app_number] => 17/681976 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17681976 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/681976
Apparatus and methods for determining memory cell data states Feb 27, 2022 Issued
Array ( [id] => 17676823 [patent_doc_number] => 20220189990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => 3D MEMORY SEMICONDUCTOR DEVICES AND STRUCTURES WITH BIT-LINE PILLARS [patent_app_type] => utility [patent_app_number] => 17/681767 [patent_app_country] => US [patent_app_date] => 2022-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17681767 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/681767
3D memory semiconductor devices and structures with bit-line pillars Feb 25, 2022 Issued
Array ( [id] => 18874458 [patent_doc_number] => 11862279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Method and device for determining repaired line and repairing line in memory, storage medium, and electronic device [patent_app_type] => utility [patent_app_number] => 17/651446 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6601 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651446 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651446
Method and device for determining repaired line and repairing line in memory, storage medium, and electronic device Feb 16, 2022 Issued
Array ( [id] => 19973183 [patent_doc_number] => 12341808 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-24 [patent_title] => Detecting automated attacks on computer systems using real-time clustering [patent_app_type] => utility [patent_app_number] => 17/671349 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 878 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671349 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/671349
Detecting automated attacks on computer systems using real-time clustering Feb 13, 2022 Issued
Array ( [id] => 19014981 [patent_doc_number] => 11921912 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-03-05 [patent_title] => Manipulating inter-chip communications for IoT security [patent_app_type] => utility [patent_app_number] => 17/670594 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4762 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17670594 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/670594
Manipulating inter-chip communications for IoT security Feb 13, 2022 Issued
Array ( [id] => 18480985 [patent_doc_number] => 11694736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle [patent_app_type] => utility [patent_app_number] => 17/668592 [patent_app_country] => US [patent_app_date] => 2022-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 16540 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17668592 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/668592
Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle Feb 9, 2022 Issued
Array ( [id] => 17737749 [patent_doc_number] => 20220223211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => INITIALIZATION TECHNIQUES FOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/586526 [patent_app_country] => US [patent_app_date] => 2022-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17586526 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/586526
Initialization techniques for memory devices Jan 26, 2022 Issued
Array ( [id] => 18639255 [patent_doc_number] => 11763871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Systems and methods for 1.5 bits per cell charge distribution [patent_app_type] => utility [patent_app_number] => 17/582941 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 13528 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17582941 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/582941
Systems and methods for 1.5 bits per cell charge distribution Jan 23, 2022 Issued
Array ( [id] => 18857028 [patent_doc_number] => 11854619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Memory device with content addressable memory units [patent_app_type] => utility [patent_app_number] => 17/579165 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579165 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579165
Memory device with content addressable memory units Jan 18, 2022 Issued
Array ( [id] => 18501479 [patent_doc_number] => 20230224314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => SESSION BASED ANOMALY DECTECTION [patent_app_type] => utility [patent_app_number] => 17/567785 [patent_app_country] => US [patent_app_date] => 2022-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5211 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17567785 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/567785
Session based anomaly dectection Jan 2, 2022 Issued
Array ( [id] => 17676359 [patent_doc_number] => 20220189526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => NON-VOLATILE ANALOG RESISTIVE MEMORY CELLS IMPLEMENTING FERROELECTRIC SELECT TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/563687 [patent_app_country] => US [patent_app_date] => 2021-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16198 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17563687 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/563687
Non-volatile analog resistive memory cells implementing ferroelectric select transistors Dec 27, 2021 Issued
Array ( [id] => 20079522 [patent_doc_number] => 12353590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Secure data processing [patent_app_type] => utility [patent_app_number] => 17/562650 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6157 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17562650 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/562650
Secure data processing Dec 26, 2021 Issued
Array ( [id] => 17537749 [patent_doc_number] => 20220116358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => PROVIDING MICRO FIREWALL LOGIC TO A MOBILE APPLICATION [patent_app_type] => utility [patent_app_number] => 17/559400 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11345 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17559400 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/559400
Providing micro firewall logic to a mobile application Dec 21, 2021 Issued
Array ( [id] => 19857149 [patent_doc_number] => 12259985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Method, apparatus, and system for automated purpose limitation and compatibility verification on a data platform [patent_app_type] => utility [patent_app_number] => 17/559550 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11868 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17559550 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/559550
Method, apparatus, and system for automated purpose limitation and compatibility verification on a data platform Dec 21, 2021 Issued
Array ( [id] => 19276138 [patent_doc_number] => 12026266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Computer-implemented system and methods for providing encrypted protected data [patent_app_type] => utility [patent_app_number] => 17/557615 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11115 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557615 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/557615
Computer-implemented system and methods for providing encrypted protected data Dec 20, 2021 Issued
Array ( [id] => 17522894 [patent_doc_number] => 20220108743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => PER BANK REFRESH HAZARD AVOIDANCE FOR LARGE SCALE MEMORY [patent_app_type] => utility [patent_app_number] => 17/551116 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7860 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17551116 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/551116
Per bank refresh hazard avoidance for large scale memory Dec 13, 2021 Issued
Array ( [id] => 18358614 [patent_doc_number] => 11647026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Automatically executing responsive actions based on a verification of an account lineage chain [patent_app_type] => utility [patent_app_number] => 17/545140 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 17156 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545140 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545140
Automatically executing responsive actions based on a verification of an account lineage chain Dec 7, 2021 Issued
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