
Han Yang
Examiner (ID: 5682, Phone: (571)270-3048 , Office: P/2824 )
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2493, 2809, 2824 |
| Total Applications | 1497 |
| Issued Applications | 1383 |
| Pending Applications | 77 |
| Abandoned Applications | 77 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19435725
[patent_doc_number] => 20240304223
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-12
[patent_title] => High Speed Differential ROM
[patent_app_type] => utility
[patent_app_number] => 18/667059
[patent_app_country] => US
[patent_app_date] => 2024-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6455
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18667059
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/667059 | High Speed Differential ROM | May 16, 2024 | Pending |
Array
(
[id] => 19405962
[patent_doc_number] => 20240289473
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => INTELLIGENT DISPLAY OF CONTENT
[patent_app_type] => utility
[patent_app_number] => 18/655537
[patent_app_country] => US
[patent_app_date] => 2024-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9207
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655537
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/655537 | Intelligent display of content | May 5, 2024 | Issued |
Array
(
[id] => 20339567
[patent_doc_number] => 20250343687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-06
[patent_title] => SECURE RANGING SECRET KEY COMPLIANCE FOR SHORT-RANGE COMMUNICATION DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/653656
[patent_app_country] => US
[patent_app_date] => 2024-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653656
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/653656 | Secure ranging secret key compliance for short-range communication devices | May 1, 2024 | Issued |
Array
(
[id] => 20002087
[patent_doc_number] => 20250140309
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-01
[patent_title] => MEMORY DEVICE AND MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/653285
[patent_app_country] => US
[patent_app_date] => 2024-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4346
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653285
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/653285 | MEMORY DEVICE AND MEMORY SYSTEM | May 1, 2024 | Pending |
Array
(
[id] => 19559633
[patent_doc_number] => 20240371425
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => COMPENSATING FOR VOLTAGE OFFSET IN MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/649393
[patent_app_country] => US
[patent_app_date] => 2024-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7638
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649393
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/649393 | Compensating for voltage offset in memory | Apr 28, 2024 | Issued |
Array
(
[id] => 20080576
[patent_doc_number] => 12354651
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-08
[patent_title] => Neural network classifier using array of three-gate non-volatile memory cells
[patent_app_type] => utility
[patent_app_number] => 18/645018
[patent_app_country] => US
[patent_app_date] => 2024-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 41
[patent_no_of_words] => 5531
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 314
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645018
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/645018 | Neural network classifier using array of three-gate non-volatile memory cells | Apr 23, 2024 | Issued |
Array
(
[id] => 19906302
[patent_doc_number] => 12283314
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-22
[patent_title] => Neural network classifier using array of three-gate non-volatile memory cells
[patent_app_type] => utility
[patent_app_number] => 18/644840
[patent_app_country] => US
[patent_app_date] => 2024-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 41
[patent_no_of_words] => 5452
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 351
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644840
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/644840 | Neural network classifier using array of three-gate non-volatile memory cells | Apr 23, 2024 | Issued |
Array
(
[id] => 19828577
[patent_doc_number] => 12249368
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-11
[patent_title] => Neural network classifier using array of three-gate non-volatile memory cells
[patent_app_type] => utility
[patent_app_number] => 18/645184
[patent_app_country] => US
[patent_app_date] => 2024-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 41
[patent_no_of_words] => 9866
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 315
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645184
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/645184 | Neural network classifier using array of three-gate non-volatile memory cells | Apr 23, 2024 | Issued |
Array
(
[id] => 19986773
[patent_doc_number] => 20250124995
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-17
[patent_title] => NONVOLATILE MEMORY DEVICE INCLUDING WORDLINE LEAKAGE CURRENT DETECTOR, STORAGE DEVICE INCLUDING THE SAME, AND METHOD OF OPERATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/639033
[patent_app_country] => US
[patent_app_date] => 2024-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8108
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18639033
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/639033 | Nonvolatile memory device including wordline leakage current detector, storage device including the same, and method of operating the same | Apr 17, 2024 | Issued |
Array
(
[id] => 19757789
[patent_doc_number] => 20250046354
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => STORAGE DEVICE FOR GENERATING A DELAY SIGNAL, AND A METHOD OF OPERATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/635071
[patent_app_country] => US
[patent_app_date] => 2024-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12640
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635071
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/635071 | Storage device for generating a delay signal, and a method of operating the same | Apr 14, 2024 | Issued |
Array
(
[id] => 20469270
[patent_doc_number] => 12525312
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-13
[patent_title] => Memory system and operation method of memory system
[patent_app_type] => utility
[patent_app_number] => 18/632323
[patent_app_country] => US
[patent_app_date] => 2024-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 0
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632323
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/632323 | Memory system and operation method of memory system | Apr 10, 2024 | Issued |
Array
(
[id] => 19348930
[patent_doc_number] => 20240257894
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-01
[patent_title] => MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 18/632306
[patent_app_country] => US
[patent_app_date] => 2024-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3441
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18632306
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/632306 | MEMORY SYSTEM AND OPERATION METHOD OF MEMORY SYSTEM | Apr 10, 2024 | Pending |
Array
(
[id] => 20283375
[patent_doc_number] => 20250308617
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => NON-VOLATILE MEMORY WITH IN-PLACE ERROR CORRECTION
[patent_app_type] => utility
[patent_app_number] => 18/624898
[patent_app_country] => US
[patent_app_date] => 2024-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 25379
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624898
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/624898 | Non-volatile memory with in-place error correction | Apr 1, 2024 | Issued |
Array
(
[id] => 19758898
[patent_doc_number] => 20250047463
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => LOW-OBSERVABLE ENCRYPTION DEVICE FOR FACILITATING COMMUNICATIONS
[patent_app_type] => utility
[patent_app_number] => 18/616048
[patent_app_country] => US
[patent_app_date] => 2024-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9671
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18616048
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/616048 | LOW-OBSERVABLE ENCRYPTION DEVICE FOR FACILITATING COMMUNICATIONS | Mar 24, 2024 | Pending |
Array
(
[id] => 20551407
[patent_doc_number] => 12562205
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-02-24
[patent_title] => Polarizable device with current compliance for polarization control
[patent_app_type] => utility
[patent_app_number] => 18/606390
[patent_app_country] => US
[patent_app_date] => 2024-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 20
[patent_no_of_words] => 4671
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18606390
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/606390 | Polarizable device with current compliance for polarization control | Mar 14, 2024 | Issued |
Array
(
[id] => 19315956
[patent_doc_number] => 12041792
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-07-16
[patent_title] => 3D memory semiconductor devices and structures with memory cells preliminary class
[patent_app_type] => utility
[patent_app_number] => 18/605401
[patent_app_country] => US
[patent_app_date] => 2024-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 40
[patent_no_of_words] => 14801
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18605401
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/605401 | 3D memory semiconductor devices and structures with memory cells preliminary class | Mar 13, 2024 | Issued |
Array
(
[id] => 19384293
[patent_doc_number] => 20240274163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => PROCESSING METHOD AND APPARATUS FOR CHECK PIN OF MEMORY, DEVICE, STORAGE MEDIUM, AND COMPUTER PROGRAM PRODUCT
[patent_app_type] => utility
[patent_app_number] => 18/604370
[patent_app_country] => US
[patent_app_date] => 2024-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17338
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604370
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/604370 | PROCESSING METHOD AND APPARATUS FOR CHECK PIN OF MEMORY, DEVICE, STORAGE MEDIUM, AND COMPUTER PROGRAM PRODUCT | Mar 12, 2024 | Pending |
Array
(
[id] => 20469273
[patent_doc_number] => 12525315
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-13
[patent_title] => Efficient read disturb scanning
[patent_app_type] => utility
[patent_app_number] => 18/600360
[patent_app_country] => US
[patent_app_date] => 2024-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 11324
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600360
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/600360 | Efficient read disturb scanning | Mar 7, 2024 | Issued |
Array
(
[id] => 20222769
[patent_doc_number] => 20250285700
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-11
[patent_title] => NON-VOLATILE MEMORY WITH EFFICIENT SETTING OF INITIAL PROGRAM VOLTAGE
[patent_app_type] => utility
[patent_app_number] => 18/596936
[patent_app_country] => US
[patent_app_date] => 2024-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15594
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 263
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18596936
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/596936 | Non-volatile memory with efficient setting of initial program voltage | Mar 5, 2024 | Issued |
Array
(
[id] => 19269023
[patent_doc_number] => 20240212727
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-27
[patent_title] => MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/595869
[patent_app_country] => US
[patent_app_date] => 2024-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7869
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18595869
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/595869 | MEMORY DEVICE | Mar 4, 2024 | Pending |