![](/images/general/no_picture/200_user.png)
Hanh N Nguyen
Examiner (ID: 8347, Phone: (571)272-2031 , Office: P/2834 )
Most Active Art Unit | 2834 |
Art Unit(s) | 2662, 2473, 2738, 2668, 2834, 2413, 2616, 2416, 2479 |
Total Applications | 3179 |
Issued Applications | 2551 |
Pending Applications | 159 |
Abandoned Applications | 469 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 11952173
[patent_doc_number] => 20170256324
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-07
[patent_title] => 'DEVICE INSPECTION METHOD, PROBE CARD, INTERPOSER, AND INSPECTION APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 15/501151
[patent_app_country] => US
[patent_app_date] => 2015-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6559
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15501151
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/501151 | DEVICE INSPECTION METHOD, PROBE CARD, INTERPOSER, AND INSPECTION APPARATUS | Jun 9, 2015 | Abandoned |
Array
(
[id] => 11700735
[patent_doc_number] => 09690651
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-27
[patent_title] => 'Controlling a redundant array of independent disks (RAID) that includes a read only flash data storage device'
[patent_app_type] => utility
[patent_app_number] => 14/718560
[patent_app_country] => US
[patent_app_date] => 2015-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6473
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14718560
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/718560 | Controlling a redundant array of independent disks (RAID) that includes a read only flash data storage device | May 20, 2015 | Issued |
Array
(
[id] => 11292531
[patent_doc_number] => 20160342463
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-24
[patent_title] => 'DATA PROTECTION IN A NAMESPACE'
[patent_app_type] => utility
[patent_app_number] => 14/717658
[patent_app_country] => US
[patent_app_date] => 2015-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7011
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14717658
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/717658 | DATA PROTECTION IN A NAMESPACE | May 19, 2015 | Abandoned |
Array
(
[id] => 13120391
[patent_doc_number] => 10078549
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-09-18
[patent_title] => Maintaining hole boundary information for restoring snapshots from parity
[patent_app_type] => utility
[patent_app_number] => 14/716740
[patent_app_country] => US
[patent_app_date] => 2015-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 9443
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14716740
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/716740 | Maintaining hole boundary information for restoring snapshots from parity | May 18, 2015 | Issued |
Array
(
[id] => 13171885
[patent_doc_number] => 10102057
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-16
[patent_title] => Providing end-to-end checksum within a distributed virtual storage area network module
[patent_app_type] => utility
[patent_app_number] => 14/716756
[patent_app_country] => US
[patent_app_date] => 2015-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 9442
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 297
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14716756
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/716756 | Providing end-to-end checksum within a distributed virtual storage area network module | May 18, 2015 | Issued |
Array
(
[id] => 11274418
[patent_doc_number] => 20160336964
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-17
[patent_title] => 'SYSTEMS AND METHODS FOR EARLY EXIT OF LAYERED LDPC DECODER'
[patent_app_type] => utility
[patent_app_number] => 14/708507
[patent_app_country] => US
[patent_app_date] => 2015-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8041
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14708507
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/708507 | Systems and methods for early exit of layered LDPC decoder | May 10, 2015 | Issued |
Array
(
[id] => 12414162
[patent_doc_number] => 09971663
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-15
[patent_title] => Method and apparatus for multiple memory shared collar architecture
[patent_app_type] => utility
[patent_app_number] => 14/671558
[patent_app_country] => US
[patent_app_date] => 2015-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3139
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14671558
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/671558 | Method and apparatus for multiple memory shared collar architecture | Mar 26, 2015 | Issued |
Array
(
[id] => 11062039
[patent_doc_number] => 20160259001
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-08
[patent_title] => 'SEMICONDUCTOR STORAGE DEVICE HAVING SYNCHRONOUS AND ASYNCHRONOUS MODES'
[patent_app_type] => utility
[patent_app_number] => 14/638458
[patent_app_country] => US
[patent_app_date] => 2015-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6698
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14638458
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/638458 | Semiconductor storage device having synchronous and asynchronous modes | Mar 3, 2015 | Issued |
Array
(
[id] => 10982651
[patent_doc_number] => 20160179596
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-23
[patent_title] => 'OPERATING METHOD OF DATA STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/638716
[patent_app_country] => US
[patent_app_date] => 2015-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6254
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14638716
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/638716 | OPERATING METHOD OF DATA STORAGE DEVICE | Mar 3, 2015 | Abandoned |
Array
(
[id] => 10800732
[patent_doc_number] => 20160146888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-05-26
[patent_title] => 'ON-CHIP FIELD TESTING METHODS AND APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 14/630149
[patent_app_country] => US
[patent_app_date] => 2015-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 17344
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14630149
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/630149 | On-chip field testing methods and apparatus | Feb 23, 2015 | Issued |
Array
(
[id] => 11598793
[patent_doc_number] => 09645963
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-05-09
[patent_title] => 'Systems and methods for concurrently testing master and slave devices in a system on a chip'
[patent_app_type] => utility
[patent_app_number] => 14/623293
[patent_app_country] => US
[patent_app_date] => 2015-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4718
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14623293
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/623293 | Systems and methods for concurrently testing master and slave devices in a system on a chip | Feb 15, 2015 | Issued |
Array
(
[id] => 11340123
[patent_doc_number] => 20160365877
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-15
[patent_title] => 'DATA PROCESSING DEVICE AND DATA PROCESSING METHOD'
[patent_app_type] => utility
[patent_app_number] => 15/117782
[patent_app_country] => US
[patent_app_date] => 2015-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 133
[patent_figures_cnt] => 133
[patent_no_of_words] => 53245
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15117782
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/117782 | DATA PROCESSING DEVICE AND DATA PROCESSING METHOD | Feb 4, 2015 | Abandoned |
Array
(
[id] => 10371288
[patent_doc_number] => 20150256294
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-10
[patent_title] => 'TRANSMISSION APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 14/614670
[patent_app_country] => US
[patent_app_date] => 2015-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4442
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14614670
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/614670 | TRANSMISSION APPARATUS | Feb 4, 2015 | Abandoned |
Array
(
[id] => 11860874
[patent_doc_number] => 09740557
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-22
[patent_title] => 'Pipelined ECC-protected memory access'
[patent_app_type] => utility
[patent_app_number] => 14/612084
[patent_app_country] => US
[patent_app_date] => 2015-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 6872
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14612084
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/612084 | Pipelined ECC-protected memory access | Feb 1, 2015 | Issued |
Array
(
[id] => 10982667
[patent_doc_number] => 20160179611
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-23
[patent_title] => 'LOW OVERHEAD ERROR CHECKING AND CORRECTION APPARATUS AND METHOD'
[patent_app_type] => utility
[patent_app_number] => 14/581878
[patent_app_country] => US
[patent_app_date] => 2014-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7981
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14581878
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/581878 | LOW OVERHEAD ERROR CHECKING AND CORRECTION APPARATUS AND METHOD | Dec 22, 2014 | Abandoned |
Array
(
[id] => 10236180
[patent_doc_number] => 20150121175
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-30
[patent_title] => 'SELF-CORRECTING COMPLEX EVENT PROCESSING SYSTEM AND CORRESPONDING METHOD FOR ERROR CORRECTION'
[patent_app_type] => utility
[patent_app_number] => 14/525737
[patent_app_country] => US
[patent_app_date] => 2014-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 6752
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14525737
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/525737 | Self-correcting complex event processing system and corresponding method for error correction | Oct 27, 2014 | Issued |
Array
(
[id] => 10724350
[patent_doc_number] => 20160070498
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-10
[patent_title] => 'Memory System Configured to Avoid Memory Access Hazards for LDPC Decoding'
[patent_app_type] => utility
[patent_app_number] => 14/522869
[patent_app_country] => US
[patent_app_date] => 2014-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 14331
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14522869
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/522869 | Memory system configured to avoid memory access hazards for LDPC decoding | Oct 23, 2014 | Issued |
Array
(
[id] => 10724351
[patent_doc_number] => 20160070499
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-10
[patent_title] => 'Configuring Circuitry with Memory Access Constraints for a Program'
[patent_app_type] => utility
[patent_app_number] => 14/523039
[patent_app_country] => US
[patent_app_date] => 2014-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 14331
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14523039
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/523039 | Configuring circuitry with memory access constraints for a program | Oct 23, 2014 | Issued |
Array
(
[id] => 11752317
[patent_doc_number] => 09710330
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-18
[patent_title] => 'Partial cloud data storage'
[patent_app_type] => utility
[patent_app_number] => 14/515214
[patent_app_country] => US
[patent_app_date] => 2014-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 20348
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14515214
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/515214 | Partial cloud data storage | Oct 14, 2014 | Issued |
Array
(
[id] => 14600813
[patent_doc_number] => 10353598
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-07-16
[patent_title] => System and method for refreshing data in a memory device
[patent_app_type] => utility
[patent_app_number] => 14/507321
[patent_app_country] => US
[patent_app_date] => 2014-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 13961
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14507321
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/507321 | System and method for refreshing data in a memory device | Oct 5, 2014 | Issued |