Search

Hannah J. Pak

Examiner (ID: 7389, Phone: (571)270-5456 , Office: P/1764 )

Most Active Art Unit
1764
Art Unit(s)
1796, 1764
Total Applications
1287
Issued Applications
948
Pending Applications
88
Abandoned Applications
275

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8254728 [patent_doc_number] => 20120159053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'STORAGE APPARATUS, MEMORY AREA MANAGING METHOD THEREOF, AND FLASH MEMORY PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/405403 [patent_app_country] => US [patent_app_date] => 2012-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9966 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20120159053.pdf [firstpage_image] =>[orig_patent_app_number] => 13405403 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/405403
STORAGE APPARATUS, MEMORY AREA MANAGING METHOD THEREOF, AND FLASH MEMORY PACKAGE Feb 26, 2012 Abandoned
Array ( [id] => 8222901 [patent_doc_number] => 20120137096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-31 [patent_title] => 'DUAL WRITING DEVICE AND ITS CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 13/363402 [patent_app_country] => US [patent_app_date] => 2012-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 17212 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13363402 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/363402
Dual writing device and its control method Jan 31, 2012 Issued
Array ( [id] => 8201725 [patent_doc_number] => 20120124287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'DATA PROCESSING SYSTEM AND MANAGEMENT METHOD' [patent_app_type] => utility [patent_app_number] => 13/359231 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 11179 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20120124287.pdf [firstpage_image] =>[orig_patent_app_number] => 13359231 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/359231
Data migration in a storage system with dynamically expansible volumes Jan 25, 2012 Issued
Array ( [id] => 8454992 [patent_doc_number] => 20120265938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-18 [patent_title] => 'PERFORMING A PARTIAL CACHE LINE STORAGE-MODIFYING OPERATION BASED UPON A HINT' [patent_app_type] => utility [patent_app_number] => 13/349315 [patent_app_country] => US [patent_app_date] => 2012-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9475 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13349315 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/349315
Performing a partial cache line storage-modifying operation based upon a hint Jan 11, 2012 Issued
Array ( [id] => 10258074 [patent_doc_number] => 20150143071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-21 [patent_title] => 'MEMORY EVENT NOTIFICATION' [patent_app_type] => utility [patent_app_number] => 13/995337 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13995337 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/995337
MEMORY EVENT NOTIFICATION Dec 29, 2011 Abandoned
Array ( [id] => 8813304 [patent_doc_number] => 20130114349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'SEMICONDUCTOR SYSTEM INCLUDING A CONTROLLER AND MEMORY' [patent_app_type] => utility [patent_app_number] => 13/341505 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2846 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13341505 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/341505
Semiconductor system including a controller having reduced number of memory buffers for transmitting data to a plurality of memory chips Dec 29, 2011 Issued
Array ( [id] => 9257720 [patent_doc_number] => 08621160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'System and method for contention-free memory access' [patent_app_type] => utility [patent_app_number] => 13/329065 [patent_app_country] => US [patent_app_date] => 2011-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 8012 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13329065 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/329065
System and method for contention-free memory access Dec 15, 2011 Issued
Array ( [id] => 9378894 [patent_doc_number] => 08683176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Dynamic address translation with translation exception qualifier' [patent_app_type] => utility [patent_app_number] => 13/312079 [patent_app_country] => US [patent_app_date] => 2011-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 21534 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13312079 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/312079
Dynamic address translation with translation exception qualifier Dec 5, 2011 Issued
Array ( [id] => 10144094 [patent_doc_number] => 09176903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Memory access during memory calibration' [patent_app_type] => utility [patent_app_number] => 13/883542 [patent_app_country] => US [patent_app_date] => 2011-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7317 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13883542 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/883542
Memory access during memory calibration Nov 6, 2011 Issued
Array ( [id] => 10623509 [patent_doc_number] => 09342452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Mapping processor address ranges to persistent storage' [patent_app_type] => utility [patent_app_number] => 14/349070 [patent_app_country] => US [patent_app_date] => 2011-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2886 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14349070 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/349070
Mapping processor address ranges to persistent storage Oct 6, 2011 Issued
Array ( [id] => 8325755 [patent_doc_number] => 20120198160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'Efficient Cache Allocation by Optimizing Size and Order of Allocate Commands Based on Bytes Required by CPU' [patent_app_type] => utility [patent_app_number] => 13/243411 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5880 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13243411 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/243411
Efficient cache allocation by optimizing size and order of allocate commands based on bytes required by CPU Sep 22, 2011 Issued
Array ( [id] => 9378888 [patent_doc_number] => 08683170 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-03-25 [patent_title] => 'Consistent distributed storage communication protocol semantics in a clustered storage system' [patent_app_type] => utility [patent_app_number] => 13/244159 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5407 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13244159 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/244159
Consistent distributed storage communication protocol semantics in a clustered storage system Sep 22, 2011 Issued
Array ( [id] => 8735113 [patent_doc_number] => 20130080682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'RECLAIMING SPACE OCCUPIED BY AN EXPIRED VARIABLE RECORD IN A NON-VOLATILE RECORD STORAGE' [patent_app_type] => utility [patent_app_number] => 13/243087 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8097 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13243087 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/243087
Reclaiming space occupied by an expired variable record in a non-volatile record storage Sep 22, 2011 Issued
Array ( [id] => 9611572 [patent_doc_number] => 08788761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'System and method for explicitly managing cache coherence' [patent_app_type] => utility [patent_app_number] => 13/243948 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10187 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13243948 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/243948
System and method for explicitly managing cache coherence Sep 22, 2011 Issued
Array ( [id] => 7721997 [patent_doc_number] => 20120011332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'DATA PROCESSING APPARATUS, METHOD FOR CONTROLLING DATA PROCESSING APPARATUS AND MEMORY CONTROL APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/240255 [patent_app_country] => US [patent_app_date] => 2011-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5470 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20120011332.pdf [firstpage_image] =>[orig_patent_app_number] => 13240255 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/240255
Interleaving data across corresponding storage groups Sep 21, 2011 Issued
Array ( [id] => 8709851 [patent_doc_number] => 20130067139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'STORAGE SYSTEM COMPRISING FLASH MEMORY, AND STORAGE CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 13/259763 [patent_app_country] => US [patent_app_date] => 2011-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 31540 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13259763 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/259763
Volume groups storing multiple generations of data in flash memory packages Sep 12, 2011 Issued
Array ( [id] => 7792855 [patent_doc_number] => 20120054411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'SYSTEM AND METHOD FOR MAINTAINING MEMORY PAGE SHARING IN A VIRTUAL ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 13/214028 [patent_app_country] => US [patent_app_date] => 2011-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9276 [patent_no_of_claims] => 67 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20120054411.pdf [firstpage_image] =>[orig_patent_app_number] => 13214028 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/214028
System and method for maintaining memory page sharing in a virtual environment Aug 18, 2011 Issued
Array ( [id] => 7719339 [patent_doc_number] => 20120008674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'MULTITHREAD PROCESSOR AND DIGITAL TELEVISION SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/209804 [patent_app_country] => US [patent_app_date] => 2011-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10347 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20120008674.pdf [firstpage_image] =>[orig_patent_app_number] => 13209804 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/209804
MULTITHREAD PROCESSOR AND DIGITAL TELEVISION SYSTEM Aug 14, 2011 Abandoned
Array ( [id] => 8619289 [patent_doc_number] => 20130024601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'User Selectable Balance Between Density and Reliability' [patent_app_type] => utility [patent_app_number] => 13/184885 [patent_app_country] => US [patent_app_date] => 2011-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9701 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13184885 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/184885
User selectable balance between density and reliability Jul 17, 2011 Issued
Array ( [id] => 8619338 [patent_doc_number] => 20130024650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'DYNAMIC STORAGE TIERING' [patent_app_type] => utility [patent_app_number] => 13/184939 [patent_app_country] => US [patent_app_date] => 2011-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3110 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13184939 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/184939
Dynamic storage tiering Jul 17, 2011 Issued
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