
Hannah J. Pak
Examiner (ID: 7389, Phone: (571)270-5456 , Office: P/1764 )
| Most Active Art Unit | 1764 |
| Art Unit(s) | 1796, 1764 |
| Total Applications | 1287 |
| Issued Applications | 948 |
| Pending Applications | 88 |
| Abandoned Applications | 275 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5734582
[patent_doc_number] => 20060259699
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-16
[patent_title] => 'PRIORITIZING CACHES HAVING A COMMON CACHE LEVEL'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/383454 | Prioritizing caches having a common cache level | May 14, 2006 | Issued |
Array
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[patent_doc_number] => 20060259694
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[patent_issue_date] => 2006-11-16
[patent_title] => 'BYPASSING CACHE INFORMATION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/383374 | Cache inspection with inspection bypass feature | May 14, 2006 | Issued |
Array
(
[id] => 5734578
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[patent_kind] => A1
[patent_issue_date] => 2006-11-16
[patent_title] => 'VISUALIZING CONTENTS AND STATES OF HIERARCHICAL STORAGE SYSTEMS ACROSS MULTIPLE CORES'
[patent_app_type] => utility
[patent_app_number] => 11/383379
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/383379 | VISUALIZING CONTENTS AND STATES OF HIERARCHICAL STORAGE SYSTEMS ACROSS MULTIPLE CORES | May 14, 2006 | Abandoned |
Array
(
[id] => 5734584
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[patent_kind] => A1
[patent_issue_date] => 2006-11-16
[patent_title] => 'PROVIDING CACHE STATUS INFORMATION ACROSS MULTIPLE CACHE LEVELS'
[patent_app_type] => utility
[patent_app_number] => 11/383461
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Array
(
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[patent_issue_date] => 2007-09-13
[patent_title] => 'Methods and systems for hierarchical management of distributed data'
[patent_app_type] => utility
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Array
(
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[patent_title] => 'Processor circuit and method of allocating a logic chip to a memory chip'
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Array
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[patent_title] => 'Data storage device and medium and related method of storing backup data'
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Array
(
[id] => 332922
[patent_doc_number] => 07512746
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[patent_kind] => B2
[patent_issue_date] => 2009-03-31
[patent_title] => 'Storage system with designated CPU cores processing transactions across storage nodes'
[patent_app_type] => utility
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[patent_drawing_sheets_cnt] => 40
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[firstpage_image] =>[orig_patent_app_number] => 11331115
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/331115 | Storage system with designated CPU cores processing transactions across storage nodes | Jan 12, 2006 | Issued |
Array
(
[id] => 5042164
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/330997 | Storage system | Jan 12, 2006 | Abandoned |
Array
(
[id] => 593494
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[patent_kind] => B2
[patent_issue_date] => 2008-12-02
[patent_title] => 'Autonomically adjusting one or more computer program configuration settings when resources in a logical partition change'
[patent_app_type] => utility
[patent_app_number] => 11/330684
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/330684 | Autonomically adjusting one or more computer program configuration settings when resources in a logical partition change | Jan 11, 2006 | Issued |
Array
(
[id] => 5671367
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[patent_title] => 'Method and apparatus for managing ternary content addressable memory'
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Array
(
[id] => 5221383
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Array
(
[id] => 7687844
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Array
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Array
(
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Array
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Array
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