Haoshian Shih

Array ( [id] => 17551539 [patent_doc_number] => 20220122881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => CONFORMAL LOW TEMPERATURE HERMETIC DIELECTRIC DIFFUSION BARRIERS [patent_app_type] => utility [patent_app_number] => 17/567762 [patent_app_country] => US [patent_app_date] => 2022-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17567762 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20082736 [patent_doc_number] => 12356838 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Display panel and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/753058 [patent_app_country] => US [patent_app_date] => 2021-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3213 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17753058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18945677 [patent_doc_number] => 20240040816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => PHOTOELECTRIC DEVICES [patent_app_type] => utility [patent_app_number] => 18/270712 [patent_app_country] => US [patent_app_date] => 2021-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18270712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18024619 [patent_doc_number] => 20220376118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING POLY-SILICON JUNCTION FIELD-EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/549118 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7722 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549118 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19055047 [patent_doc_number] => 20240097016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => COMPOUND SEMICONDUCTOR DEVICES WITH A CONDUCTIVE COMPONENT TO CONTROL ELECTRICAL CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 18/039919 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20878 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18039919 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18205612 [patent_doc_number] => 11588019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Bipolar junction transistor with constricted collector region having high gain and early voltage product [patent_app_type] => utility [patent_app_number] => 17/540428 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9283 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17540428 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18219547 [patent_doc_number] => 11594496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Marking pattern in forming staircase structure of three-dimensional memory device [patent_app_type] => utility [patent_app_number] => 17/534080 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 8186 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17534080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18780241 [patent_doc_number] => 11821953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Method and apparatus for brushless electrical machine control [patent_app_type] => utility [patent_app_number] => 17/534179 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 27 [patent_no_of_words] => 12706 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17534179 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17615694 [patent_doc_number] => 20220157974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => LAYOUT TO REDUCE CURRENT CROWDING AT ENDPOINTS [patent_app_type] => utility [patent_app_number] => 17/523513 [patent_app_country] => US [patent_app_date] => 2021-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5886 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17523513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19229781 [patent_doc_number] => 12009425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/521041 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 36 [patent_no_of_words] => 12424 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17521041 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18061929 [patent_doc_number] => 20220393016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => THIN FILM STRUCTURE, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND SEMICONDUCTOR APPARATUS INCLUDING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/518015 [patent_app_country] => US [patent_app_date] => 2021-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9161 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17518015 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19582719 [patent_doc_number] => 12148849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Obtaining a PV film structure by means of a room temperature method and room temperature method for producing a PV film structure [patent_app_type] => utility [patent_app_number] => 17/515474 [patent_app_country] => US [patent_app_date] => 2021-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5013 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17515474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19277235 [patent_doc_number] => 12027367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Substrate treatment apparatus and manufacturing method of semiconductor device [patent_app_type] => utility [patent_app_number] => 17/452125 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3640 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17452125 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17373768 [patent_doc_number] => 20220028820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => USE OF PRE-CHANNELED MATERIALS FOR ANISOTROPIC CONDUCTORS [patent_app_type] => utility [patent_app_number] => 17/490224 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490224 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20148455 [patent_doc_number] => 12382817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Display panel and mobile terminal [patent_app_type] => utility [patent_app_number] => 17/610505 [patent_app_country] => US [patent_app_date] => 2021-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17610505 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19199205 [patent_doc_number] => 11996454 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Gate-last ferroelectric field effect transistor and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/485420 [patent_app_country] => US [patent_app_date] => 2021-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 8706 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 503 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17485420 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18175316 [patent_doc_number] => 11575035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-07 [patent_title] => Quantum dot devices with top gates [patent_app_type] => utility [patent_app_number] => 17/481406 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 70 [patent_no_of_words] => 17624 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481406 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18269167 [patent_doc_number] => 20230090409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/480007 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11178 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17463915 [patent_doc_number] => 20220077221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => QUANTUM DOT CHANNEL (QDC) QUANTUM DOT GATE TRANSISTORS, MEMORIES AND OTHER DEVICES [patent_app_type] => utility [patent_app_number] => 17/478363 [patent_app_country] => US [patent_app_date] => 2021-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24596 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17478363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20649516 [patent_doc_number] => 12604479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-14 [patent_title] => Two transistor capacitorless memory cell with stacked thin-film transistors [patent_app_type] => utility [patent_app_number] => 17/471295 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 12669 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17471295 [rel_patent_id] =>[rel_patent_doc_number] =>)