
Harry Chong Hyun Kim
Examiner (ID: 5257)
| Art Unit(s) | 3509, 3626, 3501, 3629, IPLA, 3902 |
| Total Applications | 3029 |
| Issued Applications | 800 |
| Pending Applications | 1737 |
| Abandoned Applications | 68 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20191229
[patent_doc_number] => 12402368
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-26
[patent_title] => Semiconductor device and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/887156
[patent_app_country] => US
[patent_app_date] => 2022-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 2436
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 408
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887156
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/887156 | Semiconductor device and method of manufacturing the same | Aug 11, 2022 | Issued |
Array
(
[id] => 18308137
[patent_doc_number] => 20230112037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-13
[patent_title] => Semiconductor Structure and Method of Forming the Same
[patent_app_type] => utility
[patent_app_number] => 17/886321
[patent_app_country] => US
[patent_app_date] => 2022-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6919
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 332
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886321
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/886321 | Semiconductor structure and method of forming the same | Aug 10, 2022 | Issued |
Array
(
[id] => 18416164
[patent_doc_number] => 11670713
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-06
[patent_title] => LDMOS and fabricating method of the same
[patent_app_type] => utility
[patent_app_number] => 17/884599
[patent_app_country] => US
[patent_app_date] => 2022-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 3774
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884599
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/884599 | LDMOS and fabricating method of the same | Aug 9, 2022 | Issued |
Array
(
[id] => 18040278
[patent_doc_number] => 20220384495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-01
[patent_title] => MULTIPLE DEEP TRENCH ISOLATION (MDTI) STRUCTURE FOR CMOS IMAGE SENSOR
[patent_app_type] => utility
[patent_app_number] => 17/883660
[patent_app_country] => US
[patent_app_date] => 2022-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6396
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17883660
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/883660 | Multiple deep trench isolation (MDTI) structure for CMOS image sensor | Aug 8, 2022 | Issued |
Array
(
[id] => 18040431
[patent_doc_number] => 20220384648
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-01
[patent_title] => SEMICONDUCTOR DEVICE WITH DOPED REGION BETWEEN GATE AND DRAIN
[patent_app_type] => utility
[patent_app_number] => 17/884242
[patent_app_country] => US
[patent_app_date] => 2022-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8141
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884242
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/884242 | Semiconductor device with doped region between gate and drain | Aug 8, 2022 | Issued |
Array
(
[id] => 19016505
[patent_doc_number] => 11923450
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-05
[patent_title] => MOSFET in SiC with self-aligned lateral MOS channel
[patent_app_type] => utility
[patent_app_number] => 17/817384
[patent_app_country] => US
[patent_app_date] => 2022-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 39
[patent_no_of_words] => 6652
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17817384
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/817384 | MOSFET in SiC with self-aligned lateral MOS channel | Aug 3, 2022 | Issued |
Array
(
[id] => 20334444
[patent_doc_number] => 12464740
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-04
[patent_title] => Semiconductor device and module
[patent_app_type] => utility
[patent_app_number] => 17/880113
[patent_app_country] => US
[patent_app_date] => 2022-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 26
[patent_no_of_words] => 10404
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880113
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/880113 | Semiconductor device and module | Aug 2, 2022 | Issued |
Array
(
[id] => 18008832
[patent_doc_number] => 20220367599
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/876733
[patent_app_country] => US
[patent_app_date] => 2022-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4132
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876733
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/876733 | Display device | Jul 28, 2022 | Issued |
Array
(
[id] => 18008943
[patent_doc_number] => 20220367710
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => SIC SUPER JUNCTION TRENCH MOSFET
[patent_app_type] => utility
[patent_app_number] => 17/874655
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3351
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874655
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/874655 | SIC SUPER JUNCTION TRENCH MOSFET | Jul 26, 2022 | Abandoned |
Array
(
[id] => 18226821
[patent_doc_number] => 20230065815
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-02
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/871231
[patent_app_country] => US
[patent_app_date] => 2022-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9021
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 275
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871231
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/871231 | Semiconductor device and method for manufacturing the same | Jul 21, 2022 | Issued |
Array
(
[id] => 19261036
[patent_doc_number] => 12021103
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-25
[patent_title] => Method for fabricating hybrid bonded structure
[patent_app_type] => utility
[patent_app_number] => 17/870865
[patent_app_country] => US
[patent_app_date] => 2022-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 28
[patent_no_of_words] => 6785
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870865
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/870865 | Method for fabricating hybrid bonded structure | Jul 21, 2022 | Issued |
Array
(
[id] => 18150247
[patent_doc_number] => 20230024105
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-26
[patent_title] => METHOD OF MANUFACTURING OHMIC CONTACTS ON A SILICON CARBIDE (SIC) SUBSTRATE, METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/869567
[patent_app_country] => US
[patent_app_date] => 2022-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11010
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869567
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/869567 | Method of manufacturing ohmic contacts on a silicon carbide (SIC) substrate, method of manufacturing a semiconductor device, and semiconductor device | Jul 19, 2022 | Issued |
Array
(
[id] => 18919118
[patent_doc_number] => 11881406
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-23
[patent_title] => Method of manufacturing a semiconductor device and semiconductor wafer
[patent_app_type] => utility
[patent_app_number] => 17/869294
[patent_app_country] => US
[patent_app_date] => 2022-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 6732
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869294
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/869294 | Method of manufacturing a semiconductor device and semiconductor wafer | Jul 19, 2022 | Issued |
Array
(
[id] => 20334496
[patent_doc_number] => 12464792
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-04
[patent_title] => Semiconductor device and manufacturing method of semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/865400
[patent_app_country] => US
[patent_app_date] => 2022-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 4654
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865400
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/865400 | Semiconductor device and manufacturing method of semiconductor device | Jul 14, 2022 | Issued |
Array
(
[id] => 18570580
[patent_doc_number] => 20230260917
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-17
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/864132
[patent_app_country] => US
[patent_app_date] => 2022-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5062
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17864132
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/864132 | Semiconductor device | Jul 12, 2022 | Issued |
Array
(
[id] => 20760060
[patent_doc_number] => 12652852
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-06-09
[patent_title] => Semiconductor device and semiconductor package
[patent_app_type] => utility
[patent_app_number] => 17/863799
[patent_app_country] => US
[patent_app_date] => 2022-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 29
[patent_no_of_words] => 3785
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 358
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17863799
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/863799 | Semiconductor device and semiconductor package | Jul 12, 2022 | Issued |
Array
(
[id] => 19468353
[patent_doc_number] => 20240322023
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => THYRISTOR BASED ON CHARGE PLASMA AND CROSS-POINT MEMORY ARRAY INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/578745
[patent_app_country] => US
[patent_app_date] => 2022-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5679
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18578745
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/578745 | THYRISTOR BASED ON CHARGE PLASMA AND CROSS-POINT MEMORY ARRAY INCLUDING THE SAME | Jul 11, 2022 | Pending |
Array
(
[id] => 18898843
[patent_doc_number] => 20240014328
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-11
[patent_title] => DIODES WITH SCHOTTKY CONTACT INCLUDING LOCALIZED SURFACE REGIONS
[patent_app_type] => utility
[patent_app_number] => 17/811618
[patent_app_country] => US
[patent_app_date] => 2022-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10108
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17811618
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/811618 | Diodes with schottky contact including localized surface regions | Jul 10, 2022 | Issued |
Array
(
[id] => 18331918
[patent_doc_number] => 11637176
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-04-25
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/859799
[patent_app_country] => US
[patent_app_date] => 2022-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 28
[patent_no_of_words] => 12556
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 376
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17859799
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/859799 | Semiconductor device | Jul 6, 2022 | Issued |
Array
(
[id] => 20230393
[patent_doc_number] => 12419058
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-16
[patent_title] => Semiconductor structure, manufacturing method therefor and memory
[patent_app_type] => utility
[patent_app_number] => 17/857219
[patent_app_country] => US
[patent_app_date] => 2022-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 0
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857219
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/857219 | Semiconductor structure, manufacturing method therefor and memory | Jul 4, 2022 | Issued |