Harry W. Byrne

Array ( [id] => 15921607 [patent_doc_number] => 10658050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Memory controller and method of operating the same [patent_app_type] => utility [patent_app_number] => 16/706014 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 10643 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706014 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15921605 [patent_doc_number] => 10658049 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Memory controller and method of operating the same [patent_app_type] => utility [patent_app_number] => 16/705976 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 10657 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705976 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15921609 [patent_doc_number] => 10658051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Memory controller and method of operating the same [patent_app_type] => utility [patent_app_number] => 16/706052 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 10645 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706052 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16759586 [patent_doc_number] => 10978141 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-13 [patent_title] => Configurable integrated circuits [patent_app_type] => utility [patent_app_number] => 16/698851 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 3 [patent_no_of_words] => 6428 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15980607 [patent_doc_number] => 10670624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Real-time accelerometer calibration [patent_app_type] => utility [patent_app_number] => 16/694819 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 15193 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16694819 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15656433 [patent_doc_number] => 20200090747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => CIRCUITRY AND METHODS FOR PROGRAMMING RESISTIVE RANDOM ACCESS MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/693317 [patent_app_country] => US [patent_app_date] => 2019-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15905485 [patent_doc_number] => 20200152263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => MEMORY DEVICE ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 16/688835 [patent_app_country] => US [patent_app_date] => 2019-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12621 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16688835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16263757 [patent_doc_number] => 10755194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Constructing and programming quantum hardware for quantum annealing processes [patent_app_type] => utility [patent_app_number] => 16/683149 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6548 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683149 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16744463 [patent_doc_number] => 10969443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-06 [patent_title] => Magnetic flux control in superconducting devices [patent_app_type] => utility [patent_app_number] => 16/662972 [patent_app_country] => US [patent_app_date] => 2019-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 10046 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16662972 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15563839 [patent_doc_number] => 20200066331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => MEMORY REFRESH TECHNOLOGY AND COMPUTER SYSTEM [patent_app_type] => utility [patent_app_number] => 16/600034 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600034 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15641387 [patent_doc_number] => 10593698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Three-dimensional vertical NOR flash thin-film transistor strings [patent_app_type] => utility [patent_app_number] => 16/593642 [patent_app_country] => US [patent_app_date] => 2019-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 35 [patent_no_of_words] => 25065 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16593642 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16536313 [patent_doc_number] => 10878926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Systems and methods for high-performance write operations [patent_app_type] => utility [patent_app_number] => 16/591210 [patent_app_country] => US [patent_app_date] => 2019-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 35 [patent_no_of_words] => 42038 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16591210 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16536259 [patent_doc_number] => 10878872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Random access memory [patent_app_type] => utility [patent_app_number] => 16/590165 [patent_app_country] => US [patent_app_date] => 2019-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 9033 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16590165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16773736 [patent_doc_number] => 10984854 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-20 [patent_title] => Memory device with signal edge sharpener circuitry [patent_app_type] => utility [patent_app_number] => 16/589971 [patent_app_country] => US [patent_app_date] => 2019-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7987 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16589971 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16699697 [patent_doc_number] => 10950305 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-16 [patent_title] => Selective pixel output [patent_app_type] => utility [patent_app_number] => 16/586341 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 11775 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586341 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16379092 [patent_doc_number] => 20200327935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => RESISTANCE VARIABLE MEMORY DEVICE INCLUDING STACKED MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/582861 [patent_app_country] => US [patent_app_date] => 2019-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16582861 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16637799 [patent_doc_number] => 10916313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Apparatus and methods including establishing a negative body potential in a memory cell [patent_app_type] => utility [patent_app_number] => 16/574585 [patent_app_country] => US [patent_app_date] => 2019-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 9944 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16574585 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16433005 [patent_doc_number] => 10833103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-10 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/563627 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 48 [patent_no_of_words] => 8977 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16563627 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16691872 [patent_doc_number] => 20210074351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => RANDOM-ACCESS MEMORY ARRAY MEMORY CELL SELECTION [patent_app_type] => utility [patent_app_number] => 16/562507 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5612 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562507 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16160473 [patent_doc_number] => 20200218469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => MEMORY SYSTEM AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/562722 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5759 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562722 [rel_patent_id] =>[rel_patent_doc_number] =>)