Search

Harry W. Byrne

Examiner (ID: 13380, Phone: (571)270-3308 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824, 4136
Total Applications
1233
Issued Applications
1198
Pending Applications
2
Abandoned Applications
43

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15547213 [patent_doc_number] => 10573396 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Semiconductor device and method of operating the same [patent_app_type] => utility [patent_app_number] => 16/563426 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4988 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16563426 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/563426
Semiconductor device and method of operating the same Sep 5, 2019 Issued
Array ( [id] => 15427875 [patent_doc_number] => 10546877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Semiconductor device and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 16/554377 [patent_app_country] => US [patent_app_date] => 2019-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 8045 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16554377 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/554377
Semiconductor device and method of fabricating the same Aug 27, 2019 Issued
Array ( [id] => 15273861 [patent_doc_number] => 20190385665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => SYSTEMS AND METHODS FOR MAINTAINING REFRESH OPERATIONS OF MEMORY BANKS USING A SHARED ADDRESS PATH [patent_app_type] => utility [patent_app_number] => 16/553011 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15673 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553011 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/553011
Systems and methods for maintaining refresh operations of memory banks using a shared address path Aug 26, 2019 Issued
Array ( [id] => 15887957 [patent_doc_number] => 10650324 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-12 [patent_title] => Operating a quantum processor in a heterogeneous computing architecture [patent_app_type] => utility [patent_app_number] => 16/548352 [patent_app_country] => US [patent_app_date] => 2019-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11179 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16548352 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/548352
Operating a quantum processor in a heterogeneous computing architecture Aug 21, 2019 Issued
Array ( [id] => 15217467 [patent_doc_number] => 20190371420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => NON-VOLATILE MEMORY DEVICES AND SYSTEMS WITH READ-ONLY MEMORY FEATURES AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/543546 [patent_app_country] => US [patent_app_date] => 2019-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543546 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543546
Non-volatile memory devices and systems with read-only memory features and methods for operating the same Aug 16, 2019 Issued
Array ( [id] => 15400715 [patent_doc_number] => 10541017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-21 [patent_title] => Methods for independent memory bank maintenance and memory devices and systems employing the same [patent_app_type] => utility [patent_app_number] => 16/543477 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 7350 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543477 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/543477
Methods for independent memory bank maintenance and memory devices and systems employing the same Aug 15, 2019 Issued
Array ( [id] => 16566649 [patent_doc_number] => 10892023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-12 [patent_title] => Three-dimensional memory device programming with reduced disturbance [patent_app_type] => utility [patent_app_number] => 16/542270 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11267 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542270 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/542270
Three-dimensional memory device programming with reduced disturbance Aug 14, 2019 Issued
Array ( [id] => 16372180 [patent_doc_number] => 10803946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/537655 [patent_app_country] => US [patent_app_date] => 2019-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 19291 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16537655 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/537655
Semiconductor memory device Aug 11, 2019 Issued
Array ( [id] => 16264348 [patent_doc_number] => 10755789 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-25 [patent_title] => Write protection circuit [patent_app_type] => utility [patent_app_number] => 16/532871 [patent_app_country] => US [patent_app_date] => 2019-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2740 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16532871 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/532871
Write protection circuit Aug 5, 2019 Issued
Array ( [id] => 16447988 [patent_doc_number] => 10839919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Memory system and method of operating the same [patent_app_type] => utility [patent_app_number] => 16/529239 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 8234 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529239 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/529239
Memory system and method of operating the same Jul 31, 2019 Issued
Array ( [id] => 15199875 [patent_doc_number] => 10497439 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-03 [patent_title] => Non-volatile memory apparatus including voltage clamping circuit [patent_app_type] => utility [patent_app_number] => 16/521221 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6570 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521221 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521221
Non-volatile memory apparatus including voltage clamping circuit Jul 23, 2019 Issued
Array ( [id] => 15414401 [patent_doc_number] => 20200027523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => TESTING METHOD FOR SEMICONDUCTOR MEMORY [patent_app_type] => utility [patent_app_number] => 16/515626 [patent_app_country] => US [patent_app_date] => 2019-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16515626 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/515626
Testing method for semiconductor memory Jul 17, 2019 Issued
Array ( [id] => 16447942 [patent_doc_number] => 10839873 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-17 [patent_title] => Apparatus with a biasing mechanism and methods for operating the same [patent_app_type] => utility [patent_app_number] => 16/514254 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 11214 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514254 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514254
Apparatus with a biasing mechanism and methods for operating the same Jul 16, 2019 Issued
Array ( [id] => 15351101 [patent_doc_number] => 20200013442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => OUTPUT DRIVER FOR MULTI-LEVEL SIGNALING [patent_app_type] => utility [patent_app_number] => 16/514348 [patent_app_country] => US [patent_app_date] => 2019-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16514348 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/514348
Output driver for multi-level signaling Jul 16, 2019 Issued
Array ( [id] => 15563841 [patent_doc_number] => 20200066332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => MEMORY DEVICE AND METHOD OF CONTROLLING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/513494 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16513494 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/513494
Memory device and method of controlling memory device Jul 15, 2019 Issued
Array ( [id] => 16356519 [patent_doc_number] => 10797037 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-06 [patent_title] => Integrated circuit device having a plurality of stacked dies [patent_app_type] => utility [patent_app_number] => 16/511796 [patent_app_country] => US [patent_app_date] => 2019-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8808 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16511796 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/511796
Integrated circuit device having a plurality of stacked dies Jul 14, 2019 Issued
Array ( [id] => 16338566 [patent_doc_number] => 10789528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Analog neuromorphic circuits for dot-product operation implementing resistive memories [patent_app_type] => utility [patent_app_number] => 16/506145 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 21902 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506145 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506145
Analog neuromorphic circuits for dot-product operation implementing resistive memories Jul 8, 2019 Issued
Array ( [id] => 15917807 [patent_doc_number] => 10656139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Dropout detection in continuous analyte monitoring data during data excursions [patent_app_type] => utility [patent_app_number] => 16/504986 [patent_app_country] => US [patent_app_date] => 2019-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4872 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16504986 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/504986
Dropout detection in continuous analyte monitoring data during data excursions Jul 7, 2019 Issued
Array ( [id] => 16339056 [patent_doc_number] => 10790023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Three-dimensional vertical NOR flash thin-film transistor strings [patent_app_type] => utility [patent_app_number] => 16/503229 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 16807 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503229 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503229
Three-dimensional vertical NOR flash thin-film transistor strings Jul 2, 2019 Issued
Array ( [id] => 16479308 [patent_doc_number] => 10854261 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-01 [patent_title] => Efficient thermally-assisted switching [patent_app_type] => utility [patent_app_number] => 16/459559 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459559 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459559
Efficient thermally-assisted switching Jun 30, 2019 Issued
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