Search

Harry W. Byrne

Examiner (ID: 13380, Phone: (571)270-3308 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824, 4136
Total Applications
1233
Issued Applications
1198
Pending Applications
2
Abandoned Applications
43

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16249590 [patent_doc_number] => 10748965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/290406 [patent_app_country] => US [patent_app_date] => 2019-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 14421 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16290406 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/290406
Semiconductor device Feb 28, 2019 Issued
Array ( [id] => 14442193 [patent_doc_number] => 20190178969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => Memory Arrays [patent_app_type] => utility [patent_app_number] => 16/280588 [patent_app_country] => US [patent_app_date] => 2019-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3746 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16280588 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/280588
Memory arrays Feb 19, 2019 Issued
Array ( [id] => 14768673 [patent_doc_number] => 10395737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Three-dimensional vertical NOR flash thin-film transistor strings [patent_app_type] => utility [patent_app_number] => 16/280407 [patent_app_country] => US [patent_app_date] => 2019-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 16774 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16280407 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/280407
Three-dimensional vertical NOR flash thin-film transistor strings Feb 19, 2019 Issued
Array ( [id] => 15625781 [patent_doc_number] => 20200083295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/279971 [patent_app_country] => US [patent_app_date] => 2019-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8243 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16279971 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/279971
Storage device Feb 18, 2019 Issued
Array ( [id] => 14415491 [patent_doc_number] => 20190173589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => SYSTEMS AND METHODS FOR MODELING QUANTUM ENTANGLEMENT AND PERFORMING QUANTUM COMMUNICATION [patent_app_type] => utility [patent_app_number] => 16/272906 [patent_app_country] => US [patent_app_date] => 2019-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16272906 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/272906
Systems and methods for modeling quantum entanglement and performing quantum communication Feb 10, 2019 Issued
Array ( [id] => 14395377 [patent_doc_number] => 10310972 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-06-04 [patent_title] => Memory apparatus and method of wear-leveling of a memory apparatus [patent_app_type] => utility [patent_app_number] => 16/271431 [patent_app_country] => US [patent_app_date] => 2019-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6310 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16271431 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/271431
Memory apparatus and method of wear-leveling of a memory apparatus Feb 7, 2019 Issued
Array ( [id] => 14874721 [patent_doc_number] => 20190287602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => APPARATUS AND METHOD FOR CONTROLLING ERASING DATA IN FERROELECTRIC MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/269485 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7544 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16269485 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/269485
Apparatus and method for controlling erasing data in ferroelectric memory cells Feb 5, 2019 Issued
Array ( [id] => 16386238 [patent_doc_number] => 10811079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Semiconductor memory apparatus and method of driving the same [patent_app_type] => utility [patent_app_number] => 16/268807 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5844 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16268807 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/268807
Semiconductor memory apparatus and method of driving the same Feb 5, 2019 Issued
Array ( [id] => 16432671 [patent_doc_number] => 10832764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-10 [patent_title] => Low-power and high-density core-power lowering for memory write assist [patent_app_type] => utility [patent_app_number] => 16/269463 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3713 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16269463 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/269463
Low-power and high-density core-power lowering for memory write assist Feb 5, 2019 Issued
Array ( [id] => 14691061 [patent_doc_number] => 20190244646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => MAGNETIC MEMORY AND A METHOD OF OPERATING MAGNETIC MEMORY [patent_app_type] => utility [patent_app_number] => 16/265451 [patent_app_country] => US [patent_app_date] => 2019-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5507 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16265451 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/265451
Magnetic memory and a method of operating magnetic memory Jan 31, 2019 Issued
Array ( [id] => 14381393 [patent_doc_number] => 20190164609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/265591 [patent_app_country] => US [patent_app_date] => 2019-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16265591 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/265591
Semiconductor memory device and operation method thereof Jan 31, 2019 Issued
Array ( [id] => 16210143 [patent_doc_number] => 20200243133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => SUPERCONDUCTING SWITCH [patent_app_type] => utility [patent_app_number] => 16/261842 [patent_app_country] => US [patent_app_date] => 2019-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6508 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16261842 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/261842
Superconducting switch Jan 29, 2019 Issued
Array ( [id] => 16210130 [patent_doc_number] => 20200243120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => TWO-STAGE GATED-DIODE SENSE AMPLIFIER [patent_app_type] => utility [patent_app_number] => 16/257562 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16257562 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/257562
Two-stage gated-diode sense amplifier Jan 24, 2019 Issued
Array ( [id] => 16047687 [patent_doc_number] => 10685722 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-16 [patent_title] => Method and system for improving performance of a storage device using asynchronous independent plane read functionality [patent_app_type] => utility [patent_app_number] => 16/256010 [patent_app_country] => US [patent_app_date] => 2019-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7092 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16256010 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/256010
Method and system for improving performance of a storage device using asynchronous independent plane read functionality Jan 23, 2019 Issued
Array ( [id] => 14555609 [patent_doc_number] => 10346266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Non-volatile storage system that reclaims bad blocks [patent_app_type] => utility [patent_app_number] => 16/254334 [patent_app_country] => US [patent_app_date] => 2019-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 13496 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16254334 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/254334
Non-volatile storage system that reclaims bad blocks Jan 21, 2019 Issued
Array ( [id] => 14555669 [patent_doc_number] => 10346296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Data storage device [patent_app_type] => utility [patent_app_number] => 16/253043 [patent_app_country] => US [patent_app_date] => 2019-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3049 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16253043 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/253043
Data storage device Jan 20, 2019 Issued
Array ( [id] => 14707237 [patent_doc_number] => 10381378 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-13 [patent_title] => Three-dimensional vertical NOR flash thin-film transistor strings [patent_app_type] => utility [patent_app_number] => 16/252301 [patent_app_country] => US [patent_app_date] => 2019-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 35 [patent_no_of_words] => 24972 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 368 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16252301 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/252301
Three-dimensional vertical NOR flash thin-film transistor strings Jan 17, 2019 Issued
Array ( [id] => 16172596 [patent_doc_number] => 10714172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Bi-sided pattern processor [patent_app_type] => utility [patent_app_number] => 16/248933 [patent_app_country] => US [patent_app_date] => 2019-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6922 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16248933 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/248933
Bi-sided pattern processor Jan 15, 2019 Issued
Array ( [id] => 14556551 [patent_doc_number] => 10346738 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Analog neuromorphic circuits for dot-product operation implementing resistive memories [patent_app_type] => utility [patent_app_number] => 16/242146 [patent_app_country] => US [patent_app_date] => 2019-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 22038 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16242146 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/242146
Analog neuromorphic circuits for dot-product operation implementing resistive memories Jan 7, 2019 Issued
Array ( [id] => 14177911 [patent_doc_number] => 10262976 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-16 [patent_title] => Package including a plurality of stacked semiconductor devices, an interposer and interface connections [patent_app_type] => utility [patent_app_number] => 16/238760 [patent_app_country] => US [patent_app_date] => 2019-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 8440 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16238760 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/238760
Package including a plurality of stacked semiconductor devices, an interposer and interface connections Jan 2, 2019 Issued
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