Search

Harry W. Byrne

Examiner (ID: 13380, Phone: (571)270-3308 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824, 4136
Total Applications
1233
Issued Applications
1198
Pending Applications
2
Abandoned Applications
43

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14525443 [patent_doc_number] => 10339992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Semiconductor system [patent_app_type] => utility [patent_app_number] => 16/238377 [patent_app_country] => US [patent_app_date] => 2019-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 11738 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16238377 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/238377
Semiconductor system Jan 1, 2019 Issued
Array ( [id] => 14984577 [patent_doc_number] => 10446208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Applications of non-collinearly coupled magnetic layers [patent_app_type] => utility [patent_app_number] => 16/228725 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 72 [patent_no_of_words] => 43790 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16228725 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/228725
Applications of non-collinearly coupled magnetic layers Dec 19, 2018 Issued
Array ( [id] => 15217451 [patent_doc_number] => 20190371412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/223656 [patent_app_country] => US [patent_app_date] => 2018-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16223656 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/223656
Memory device and operation method thereof Dec 17, 2018 Issued
Array ( [id] => 16080195 [patent_doc_number] => 20200194084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => APPARATUS AND METHODS FOR DETERMINING DATA STATES OF MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 16/221765 [patent_app_country] => US [patent_app_date] => 2018-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13020 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16221765 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/221765
Methods for determining data states of memory cells Dec 16, 2018 Issued
Array ( [id] => 15687481 [patent_doc_number] => 20200098404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/219483 [patent_app_country] => US [patent_app_date] => 2018-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16219483 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/219483
Semiconductor device Dec 12, 2018 Issued
Array ( [id] => 15581171 [patent_doc_number] => 10580980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Method, system, and device for phase change memory switch wall cell with approximately horizontal electrode contact cross references [patent_app_type] => utility [patent_app_number] => 16/216161 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6364 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216161 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/216161
Method, system, and device for phase change memory switch wall cell with approximately horizontal electrode contact cross references Dec 10, 2018 Issued
Array ( [id] => 14366445 [patent_doc_number] => 10304534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Apparatuses and methods including memory access in cross point memory [patent_app_type] => utility [patent_app_number] => 16/198347 [patent_app_country] => US [patent_app_date] => 2018-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16198347 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/198347
Apparatuses and methods including memory access in cross point memory Nov 20, 2018 Issued
Array ( [id] => 14379301 [patent_doc_number] => 20190163563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => MEMORY SYSTEM AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/196928 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16196928 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/196928
Memory system and operating method thereof Nov 19, 2018 Issued
Array ( [id] => 15889035 [patent_doc_number] => 10650866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Charge pump drive circuit [patent_app_type] => utility [patent_app_number] => 16/194761 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3488 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194761 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/194761
Charge pump drive circuit Nov 18, 2018 Issued
Array ( [id] => 16067221 [patent_doc_number] => 10692570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Neural network matrix multiplication in memory cells [patent_app_type] => utility [patent_app_number] => 16/195175 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13377 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16195175 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/195175
Neural network matrix multiplication in memory cells Nov 18, 2018 Issued
Array ( [id] => 14074995 [patent_doc_number] => 20190086385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => Dropout Detection in Continuous Analyte Monitoring Data During Data Excursions [patent_app_type] => utility [patent_app_number] => 16/193881 [patent_app_country] => US [patent_app_date] => 2018-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16193881 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/193881
Dropout detection in continuous analyte monitoring data during data excursions Nov 15, 2018 Issued
Array ( [id] => 14508905 [patent_doc_number] => 20190198107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-27 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/192377 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11052 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16192377 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/192377
Semiconductor device Nov 14, 2018 Issued
Array ( [id] => 14316481 [patent_doc_number] => 20190147944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => STATIC RANDOM-ACCESS MEMORY WITH VIRTUAL BANKING ARCHITECTURE, AND SYSTEM AND METHOD INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 16/191717 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5512 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191717 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/191717
Static random-access memory with virtual banking architecture, and system and method including the same Nov 14, 2018 Issued
Array ( [id] => 14237581 [patent_doc_number] => 20190130963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => SYSTEMS AND METHODS FOR MAINTAINING REFRESH OPERATIONS OF MEMORY BANKS USING A SHARED ADDRESS PATH [patent_app_type] => utility [patent_app_number] => 16/192389 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16192389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/192389
Systems and methods for maintaining refresh operations of memory banks using a shared address path Nov 14, 2018 Issued
Array ( [id] => 14903793 [patent_doc_number] => 20190295662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/190027 [patent_app_country] => US [patent_app_date] => 2018-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10621 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16190027 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/190027
Memory controller and method of operating the same Nov 12, 2018 Issued
Array ( [id] => 15250483 [patent_doc_number] => 10510771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Three-dimensional memory devices having plurality of vertical channel structures [patent_app_type] => utility [patent_app_number] => 16/182047 [patent_app_country] => US [patent_app_date] => 2018-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 13095 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16182047 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/182047
Three-dimensional memory devices having plurality of vertical channel structures Nov 5, 2018 Issued
Array ( [id] => 14022891 [patent_doc_number] => 20190073439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => QUANTUM COCHLEA FOR EFFICIENT SPECTRUM ANALYSIS [patent_app_type] => utility [patent_app_number] => 16/178764 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16178764 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/178764
Quantum cochlea for efficient spectrum analysis Nov 1, 2018 Issued
Array ( [id] => 14330417 [patent_doc_number] => 10296226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Control logic, semiconductor memory device, and operating method [patent_app_type] => utility [patent_app_number] => 16/177109 [patent_app_country] => US [patent_app_date] => 2018-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 8118 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16177109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/177109
Control logic, semiconductor memory device, and operating method Oct 30, 2018 Issued
Array ( [id] => 13993649 [patent_doc_number] => 20190065982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => ADIABATIC PHASE GATES IN PARITY-BASED QUANTUM COMPUTERS [patent_app_type] => utility [patent_app_number] => 16/172439 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172439 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172439
Adiabatic phase gates in parity-based quantum computers Oct 25, 2018 Issued
Array ( [id] => 14799475 [patent_doc_number] => 10402743 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-09-03 [patent_title] => Operating a quantum processor in a heterogeneous computing architecture [patent_app_type] => utility [patent_app_number] => 16/170302 [patent_app_country] => US [patent_app_date] => 2018-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11153 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16170302 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/170302
Operating a quantum processor in a heterogeneous computing architecture Oct 24, 2018 Issued
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