
Hashem Farrokh
Examiner (ID: 384, Phone: (571)272-4193 , Office: P/2131 )
| Most Active Art Unit | 2138 |
| Art Unit(s) | 2131, 2188, 2187, 2138, 2135 |
| Total Applications | 1272 |
| Issued Applications | 1114 |
| Pending Applications | 61 |
| Abandoned Applications | 119 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20680606
[patent_doc_number] => 20260119427
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-04-30
[patent_title] => FLASH-DRAM HYBRID MEMORY MODULE
[patent_app_type] => utility
[patent_app_number] => 19/412697
[patent_app_country] => US
[patent_app_date] => 2025-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16199
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -66
[patent_words_short_claim] => 528
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19412697
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/412697 | FLASH-DRAM HYBRID MEMORY MODULE | Dec 7, 2025 | Pending |
Array
(
[id] => 20460885
[patent_doc_number] => 20260010312
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-01-08
[patent_title] => DETERMINING AVAILABLE RESOURCES FOR STORING DATA
[patent_app_type] => utility
[patent_app_number] => 19/269964
[patent_app_country] => US
[patent_app_date] => 2025-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14969
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19269964
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/269964 | DETERMINING AVAILABLE RESOURCES FOR STORING DATA | Jul 14, 2025 | Pending |
Array
(
[id] => 20323293
[patent_doc_number] => 20250335381
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-30
[patent_title] => FLASH-DRAM HYBRID MEMORY MODULE
[patent_app_type] => utility
[patent_app_number] => 19/261245
[patent_app_country] => US
[patent_app_date] => 2025-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16198
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19261245
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/261245 | FLASH-DRAM HYBRID MEMORY MODULE | Jul 6, 2025 | Pending |
Array
(
[id] => 20221461
[patent_doc_number] => 20250284392
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-11
[patent_title] => MEMORY SYSTEM AND METHOD OF CONTROLLING NON-VOLATILE MEMORY
[patent_app_type] => utility
[patent_app_number] => 19/217677
[patent_app_country] => US
[patent_app_date] => 2025-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3458
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19217677
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/217677 | MEMORY SYSTEM AND METHOD OF CONTROLLING NON-VOLATILE MEMORY | May 22, 2025 | Pending |
Array
(
[id] => 20421913
[patent_doc_number] => 20250383998
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-18
[patent_title] => METHOD AND DEVICE FOR SEQUENTIAL READ COMMAND THROUGHPUT FOR LOGICAL-TO-PHYSICAL LOOK-UP
[patent_app_type] => utility
[patent_app_number] => 19/210750
[patent_app_country] => US
[patent_app_date] => 2025-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4399
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19210750
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/210750 | METHOD AND DEVICE FOR SEQUENTIAL READ COMMAND THROUGHPUT FOR LOGICAL-TO-PHYSICAL LOOK-UP | May 15, 2025 | Pending |
Array
(
[id] => 20208475
[patent_doc_number] => 20250278195
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-04
[patent_title] => Data Read/Write Method and Related Apparatus
[patent_app_type] => utility
[patent_app_number] => 19/210573
[patent_app_country] => US
[patent_app_date] => 2025-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8969
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19210573
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/210573 | Data Read/Write Method and Related Apparatus | May 15, 2025 | Pending |
Array
(
[id] => 20166572
[patent_doc_number] => 20250258619
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-14
[patent_title] => INCOMPLETE SUPERBLOCK MANAGEMENT FOR MEMORY SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 19/193063
[patent_app_country] => US
[patent_app_date] => 2025-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3372
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19193063
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/193063 | INCOMPLETE SUPERBLOCK MANAGEMENT FOR MEMORY SYSTEMS | Apr 28, 2025 | Pending |
Array
(
[id] => 20724157
[patent_doc_number] => 20260140870
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-05-21
[patent_title] => ZUFS MEMORY SYSTEMS, METHODS OF OPERATING, AND SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 19/184558
[patent_app_country] => US
[patent_app_date] => 2025-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7752
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19184558
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/184558 | ZUFS MEMORY SYSTEMS, METHODS OF OPERATING, AND SYSTEMS | Apr 20, 2025 | Pending |
Array
(
[id] => 20365753
[patent_doc_number] => 20250355565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-20
[patent_title] => MODULATING PEAK OPERATING TEMPERATURE IN A MEMORY SUB-SYSTEM
[patent_app_type] => utility
[patent_app_number] => 19/179607
[patent_app_country] => US
[patent_app_date] => 2025-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3501
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19179607
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/179607 | MODULATING PEAK OPERATING TEMPERATURE IN A MEMORY SUB-SYSTEM | Apr 14, 2025 | Pending |
Array
(
[id] => 20380555
[patent_doc_number] => 20250363048
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-27
[patent_title] => TECHNIQUES FOR MAPPING TABLE SIZE REDUCTION
[patent_app_type] => utility
[patent_app_number] => 19/178410
[patent_app_country] => US
[patent_app_date] => 2025-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3824
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19178410
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/178410 | TECHNIQUES FOR MAPPING TABLE SIZE REDUCTION | Apr 13, 2025 | Pending |
Array
(
[id] => 20234201
[patent_doc_number] => 20250291520
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-18
[patent_title] => System and Method for Provisioning a Cloud Tape Library
[patent_app_type] => utility
[patent_app_number] => 19/075780
[patent_app_country] => US
[patent_app_date] => 2025-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3762
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19075780
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/075780 | System and Method for Provisioning a Cloud Tape Library | Mar 9, 2025 | Pending |
Array
(
[id] => 20296651
[patent_doc_number] => 20250321894
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-16
[patent_title] => MEMORY EFFICIENT MULTI-VERSIONED CONCURRENCY FOR A HYPERCUBE MEMORY CACHE USING VIRTUAL TUPLES
[patent_app_type] => utility
[patent_app_number] => 19/046097
[patent_app_country] => US
[patent_app_date] => 2025-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22685
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19046097
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/046097 | MEMORY EFFICIENT MULTI-VERSIONED CONCURRENCY FOR A HYPERCUBE MEMORY CACHE USING VIRTUAL TUPLES | Feb 4, 2025 | Pending |
Array
(
[id] => 20043297
[patent_doc_number] => 20250181519
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => CONCURRENT SUPPORT FOR MULTIPLE CACHE INCLUSIVITY SCHEMES USING LOW PRIORITY EVICT OPERATIONS
[patent_app_type] => utility
[patent_app_number] => 19/044137
[patent_app_country] => US
[patent_app_date] => 2025-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13807
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19044137
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/044137 | CONCURRENT SUPPORT FOR MULTIPLE CACHE INCLUSIVITY SCHEMES USING LOW PRIORITY EVICT OPERATIONS | Feb 2, 2025 | Pending |
Array
(
[id] => 20035044
[patent_doc_number] => 20250173266
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-29
[patent_title] => METHOD AND SYSTEM FOR STORAGE VIRTUALIZATION
[patent_app_type] => utility
[patent_app_number] => 19/033224
[patent_app_country] => US
[patent_app_date] => 2025-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6298
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19033224
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/033224 | METHOD AND SYSTEM FOR STORAGE VIRTUALIZATION | Jan 20, 2025 | Pending |
Array
(
[id] => 20017894
[patent_doc_number] => 20250156116
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-15
[patent_title] => Performing Low Latency Operations Using A Distinct Set Of Resources
[patent_app_type] => utility
[patent_app_number] => 19/022711
[patent_app_country] => US
[patent_app_date] => 2025-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 39059
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19022711
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/022711 | Performing Low Latency Operations Using A Distinct Set Of Resources | Jan 14, 2025 | Pending |
Array
(
[id] => 20009666
[patent_doc_number] => 20250147888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-08
[patent_title] => HARDWARE COHERENCE SIGNALING PROTOCOL
[patent_app_type] => utility
[patent_app_number] => 19/017952
[patent_app_country] => US
[patent_app_date] => 2025-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10959
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19017952
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/017952 | HARDWARE COHERENCE SIGNALING PROTOCOL | Jan 12, 2025 | Pending |
Array
(
[id] => 20513325
[patent_doc_number] => 20260037426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-02-05
[patent_title] => MEMORY DEVICE, OPERATING METHOD AND MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 19/011399
[patent_app_country] => US
[patent_app_date] => 2025-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8931
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19011399
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/011399 | MEMORY DEVICE, OPERATING METHOD AND MEMORY SYSTEM | Jan 5, 2025 | Pending |
Array
(
[id] => 20221460
[patent_doc_number] => 20250284391
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-11
[patent_title] => MEMORY MANAGEMENT UNIT
[patent_app_type] => utility
[patent_app_number] => 19/006846
[patent_app_country] => US
[patent_app_date] => 2024-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19006846
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/006846 | Memory management unit | Dec 30, 2024 | Issued |
Array
(
[id] => 19864717
[patent_doc_number] => 20250103503
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-27
[patent_title] => ZERO LATENCY PREFETCHING IN CACHES
[patent_app_type] => utility
[patent_app_number] => 18/976568
[patent_app_country] => US
[patent_app_date] => 2024-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15881
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18976568
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/976568 | ZERO LATENCY PREFETCHING IN CACHES | Dec 10, 2024 | Pending |
Array
(
[id] => 20380324
[patent_doc_number] => 20250362817
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-27
[patent_title] => DATA STORAGE DEVICE AND METHOD OF OPERATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/974824
[patent_app_country] => US
[patent_app_date] => 2024-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2534
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18974824
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/974824 | DATA STORAGE DEVICE AND METHOD OF OPERATING THE SAME | Dec 9, 2024 | Pending |