Hashem Farrokh

Array ( [id] => 14217033 [patent_doc_number] => 20190120901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => Test device for testing integrated circuit [patent_app_type] => utility [patent_app_number] => 16/142141 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3978 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16142141 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16667162 [patent_doc_number] => 10936408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Error correction of multiple bit errors per codeword [patent_app_type] => utility [patent_app_number] => 16/141862 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5886 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16141862 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13742127 [patent_doc_number] => 20180375533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => PARALLEL BIT INTERLEAVER [patent_app_type] => utility [patent_app_number] => 16/122466 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122466 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13910681 [patent_doc_number] => 20190044545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => PARALLEL BIT INTERLEAVER [patent_app_type] => utility [patent_app_number] => 16/117625 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16117625 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14302423 [patent_doc_number] => 10291351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Transmission method, reception method, transmitter, and receiver [patent_app_type] => utility [patent_app_number] => 16/034783 [patent_app_country] => US [patent_app_date] => 2018-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 162 [patent_figures_cnt] => 166 [patent_no_of_words] => 163433 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16034783 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13906313 [patent_doc_number] => 20190042361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => XOR PARITY MANAGEMENT ON A PHYSICALLY ADDRESSABLE SOLID STATE DRIVE [patent_app_type] => utility [patent_app_number] => 16/019990 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16019990 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15333679 [patent_doc_number] => 20200007169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => System-Level Error Correction Coding Allocation Based On Device Population Data Integrity Sharing [patent_app_type] => utility [patent_app_number] => 16/020853 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020853 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15299565 [patent_doc_number] => 20190392918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => ADJUSTABLE VOLTAGE DROP DETECTION THRESHOLD IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/017315 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017315 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15297475 [patent_doc_number] => 20190391873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => OVERWRITING DATA OBJECTS IN A DISPERSED STORAGE NETWORK [patent_app_type] => utility [patent_app_number] => 16/017491 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 834 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13742285 [patent_doc_number] => 20180375612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => COMMUNICATION TECHNIQUES INVOLVING POLAR CODEWORDS WITH REDUCED REPETITION [patent_app_type] => utility [patent_app_number] => 16/017233 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017233 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13495931 [patent_doc_number] => 20180299508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => SELECTABLE JTAG OR TRACE ACCESS WITH DATA STORE AND OUTPUT [patent_app_type] => utility [patent_app_number] => 16/011008 [patent_app_country] => US [patent_app_date] => 2018-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16011008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15235871 [patent_doc_number] => 10505671 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Polar code encoding method and device [patent_app_type] => utility [patent_app_number] => 16/007966 [patent_app_country] => US [patent_app_date] => 2018-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 10648 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16007966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16859170 [patent_doc_number] => 20210159915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => POLAR DECODER WITH LLR-DOMAIN COMPUTATION OF F-FUNCTION AND G-FUNCTION [patent_app_type] => utility [patent_app_number] => 16/622905 [patent_app_country] => US [patent_app_date] => 2018-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29625 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16622905 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17501410 [patent_doc_number] => 11290128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Simplified check node processing in non-binary LDPC decoder [patent_app_type] => utility [patent_app_number] => 16/621830 [patent_app_country] => US [patent_app_date] => 2018-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 22238 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16621830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15012655 [patent_doc_number] => 10452472 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-22 [patent_title] => Tunable and dynamically adjustable error correction for memristor crossbars [patent_app_type] => utility [patent_app_number] => 15/997030 [patent_app_country] => US [patent_app_date] => 2018-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15997030 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14952811 [patent_doc_number] => 10437670 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-08 [patent_title] => Metadata hardening and parity accumulation for log-structured arrays [patent_app_type] => utility [patent_app_number] => 15/988889 [patent_app_country] => US [patent_app_date] => 2018-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 15212 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15988889 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15730993 [patent_doc_number] => 10613925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Data duplication in a non-volatile memory [patent_app_type] => utility [patent_app_number] => 15/983647 [patent_app_country] => US [patent_app_date] => 2018-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 7340 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15983647 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14235241 [patent_doc_number] => 20190129793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => DEVICE AND METHOD FOR ACCESSING IN-BAND MEMORY USING DATA PROTECTION [patent_app_type] => utility [patent_app_number] => 15/981429 [patent_app_country] => US [patent_app_date] => 2018-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15981429 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15919219 [patent_doc_number] => 10656847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Mitigating asymmetric transient errors in non-volatile memory by proactive data relocation [patent_app_type] => utility [patent_app_number] => 15/976586 [patent_app_country] => US [patent_app_date] => 2018-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7609 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15976586 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13544521 [patent_doc_number] => 20180323807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => METHOD AND APPARATUS FOR CHANNEL ENCODING AND DECODING IN COMMUNICATION OR BROADCASTING SYSTEM [patent_app_type] => utility [patent_app_number] => 15/971877 [patent_app_country] => US [patent_app_date] => 2018-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17067 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15971877 [rel_patent_id] =>[rel_patent_doc_number] =>)