
Hashem Farrokh
Examiner (ID: 384, Phone: (571)272-4193 , Office: P/2131 )
| Most Active Art Unit | 2138 |
| Art Unit(s) | 2131, 2188, 2187, 2138, 2135 |
| Total Applications | 1272 |
| Issued Applications | 1114 |
| Pending Applications | 61 |
| Abandoned Applications | 119 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17301635
[patent_doc_number] => 20210397474
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-23
[patent_title] => PREDICTIVE SCHEDULED BACKUP SYSTEM AND METHOD
[patent_app_type] => utility
[patent_app_number] => 16/909953
[patent_app_country] => US
[patent_app_date] => 2020-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6458
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909953
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/909953 | Predictive scheduled backup system and method | Jun 22, 2020 | Issued |
Array
(
[id] => 17802086
[patent_doc_number] => 11416387
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-16
[patent_title] => Memory system and method for controlling nonvolatile memory
[patent_app_type] => utility
[patent_app_number] => 16/899805
[patent_app_country] => US
[patent_app_date] => 2020-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 38
[patent_no_of_words] => 14509
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899805
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/899805 | Memory system and method for controlling nonvolatile memory | Jun 11, 2020 | Issued |
Array
(
[id] => 16918533
[patent_doc_number] => 20210191625
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-24
[patent_title] => APPARATUS AND METHOD FOR IMPROVING INPUT/OUTPUT THROUGHPUT OF MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/900457
[patent_app_country] => US
[patent_app_date] => 2020-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19168
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16900457
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/900457 | Apparatus and method for improving input/output throughput of memory system | Jun 11, 2020 | Issued |
Array
(
[id] => 17294060
[patent_doc_number] => 20210389899
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-16
[patent_title] => GARBAGE COLLECTION IN A STORAGE SYSTEM AT SUB-VIRTUAL BLOCK GRANULARITY LEVEL
[patent_app_type] => utility
[patent_app_number] => 16/897388
[patent_app_country] => US
[patent_app_date] => 2020-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8929
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16897388
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/897388 | Garbage collection in a storage system at sub-virtual block granularity level | Jun 9, 2020 | Issued |
Array
(
[id] => 16508053
[patent_doc_number] => 20200387309
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-10
[patent_title] => SEGMENT CLEANING METHOD USING NON-VOLATILE RANDOM-ACCESS MEMORY AND MEMORY MANAGEMENT APPARATUS THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/886929
[patent_app_country] => US
[patent_app_date] => 2020-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3390
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16886929
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/886929 | Segment cleaning method using non-volatile random-access memory and memory management apparatus thereof | May 28, 2020 | Issued |
Array
(
[id] => 17605991
[patent_doc_number] => 11334480
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-17
[patent_title] => Data storage device and non-volatile memory control method
[patent_app_type] => utility
[patent_app_number] => 16/885627
[patent_app_country] => US
[patent_app_date] => 2020-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4086
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885627
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/885627 | Data storage device and non-volatile memory control method | May 27, 2020 | Issued |
Array
(
[id] => 16470397
[patent_doc_number] => 20200371934
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => HARDWARE COHERENCE SIGNALING PROTOCOL
[patent_app_type] => utility
[patent_app_number] => 16/882229
[patent_app_country] => US
[patent_app_date] => 2020-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16017
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882229
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/882229 | Hardware coherence signaling protocol | May 21, 2020 | Issued |
Array
(
[id] => 18422271
[patent_doc_number] => 20230176735
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-08
[patent_title] => ACCELERATING SYSTEM BOOT TIMES VIA
HOST-MANAGED DEVICE MEMORY
[patent_app_type] => utility
[patent_app_number] => 17/997030
[patent_app_country] => US
[patent_app_date] => 2020-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6812
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17997030
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/997030 | Accelerating system boot times via host-managed device memory | May 21, 2020 | Issued |
Array
(
[id] => 17201975
[patent_doc_number] => 20210342070
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-04
[patent_title] => METHOD, ELECTRONIC DEVICE, AND COMPUTER STORAGE MEDIUM FOR INFORMATION PROCESSING
[patent_app_type] => utility
[patent_app_number] => 16/875506
[patent_app_country] => US
[patent_app_date] => 2020-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4616
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16875506
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/875506 | Method, electronic device, and computer storage medium for information processing | May 14, 2020 | Issued |
Array
(
[id] => 17202371
[patent_doc_number] => 20210342466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-04
[patent_title] => SECURE MODULAR DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/863250
[patent_app_country] => US
[patent_app_date] => 2020-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3768
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16863250
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/863250 | Secure modular devices | Apr 29, 2020 | Issued |
Array
(
[id] => 17706938
[patent_doc_number] => 20220206944
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-30
[patent_title] => CACHE ALLOCATION METHOD AND DEVICE, STORAGE MEDIUM, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/606449
[patent_app_country] => US
[patent_app_date] => 2020-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4566
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17606449
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/606449 | Cache allocation method and device, storage medium, and electronic device | Apr 29, 2020 | Issued |
Array
(
[id] => 17031358
[patent_doc_number] => 11093169
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-08-17
[patent_title] => Lockless metadata binary tree access
[patent_app_type] => utility
[patent_app_number] => 16/861986
[patent_app_country] => US
[patent_app_date] => 2020-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 12907
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16861986
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/861986 | Lockless metadata binary tree access | Apr 28, 2020 | Issued |
Array
(
[id] => 16240370
[patent_doc_number] => 20200257604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-13
[patent_title] => MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/858455
[patent_app_country] => US
[patent_app_date] => 2020-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 26194
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16858455
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/858455 | Memory system | Apr 23, 2020 | Issued |
Array
(
[id] => 17157911
[patent_doc_number] => 20210318962
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-14
[patent_title] => REVERSE SHADOW PAGE TABLES FOR FIREWALLED NESTED ENCRYPTED VIRTUAL MACHINES
[patent_app_type] => utility
[patent_app_number] => 16/846612
[patent_app_country] => US
[patent_app_date] => 2020-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8254
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 247
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16846612
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/846612 | Reverse shadow page tables for firewalled nested encrypted virtual machines | Apr 12, 2020 | Issued |
Array
(
[id] => 16160863
[patent_doc_number] => 20200218664
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-09
[patent_title] => Flash Memory Devices and Prefetch Methods Thereof
[patent_app_type] => utility
[patent_app_number] => 16/825354
[patent_app_country] => US
[patent_app_date] => 2020-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2784
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16825354
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/825354 | Flash memory devices and prefetch methods thereof | Mar 19, 2020 | Issued |
Array
(
[id] => 16794683
[patent_doc_number] => 20210124500
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-29
[patent_title] => SYSTEM AND METHOD FOR HIERARCHICAL SORT ACCELERATION NEAR STORAGE
[patent_app_type] => utility
[patent_app_number] => 16/821811
[patent_app_country] => US
[patent_app_date] => 2020-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9126
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821811
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/821811 | System and method for hierarchical sort acceleration near storage | Mar 16, 2020 | Issued |
Array
(
[id] => 17288320
[patent_doc_number] => 11204870
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-21
[patent_title] => Techniques for determining and using caching scores for cached data
[patent_app_type] => utility
[patent_app_number] => 16/818139
[patent_app_country] => US
[patent_app_date] => 2020-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 17116
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16818139
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/818139 | Techniques for determining and using caching scores for cached data | Mar 12, 2020 | Issued |
Array
(
[id] => 16095365
[patent_doc_number] => 20200201669
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-25
[patent_title] => STORAGE DEVICE AND STORAGE VIRTUALIZATION SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/810500
[patent_app_country] => US
[patent_app_date] => 2020-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11751
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810500
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/810500 | Storage device and storage virtualization system | Mar 4, 2020 | Issued |
Array
(
[id] => 18998024
[patent_doc_number] => 11914870
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-27
[patent_title] => Side-channel-attack-resistant memory access on embedded central processing units
[patent_app_type] => utility
[patent_app_number] => 17/435360
[patent_app_country] => US
[patent_app_date] => 2020-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4318
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17435360
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/435360 | Side-channel-attack-resistant memory access on embedded central processing units | Mar 3, 2020 | Issued |
Array
(
[id] => 17786531
[patent_doc_number] => 11409655
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-09
[patent_title] => Interface apparatus, data processing apparatus, cache control method, and medium
[patent_app_type] => utility
[patent_app_number] => 16/799061
[patent_app_country] => US
[patent_app_date] => 2020-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 11671
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16799061
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/799061 | Interface apparatus, data processing apparatus, cache control method, and medium | Feb 23, 2020 | Issued |