Search

Hashem Farrokh

Examiner (ID: 211, Phone: (571)272-4193 , Office: P/2131 )

Most Active Art Unit
2138
Art Unit(s)
2187, 2188, 2131, 2138, 2135
Total Applications
1269
Issued Applications
1112
Pending Applications
60
Abandoned Applications
119

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14605023 [patent_doc_number] => 10355711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Data processing method and system based on quasi-cyclic LDPC [patent_app_type] => utility [patent_app_number] => 15/638014 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6935 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15638014 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/638014
Data processing method and system based on quasi-cyclic LDPC Jun 28, 2017 Issued
Array ( [id] => 15287483 [patent_doc_number] => 10516417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-24 [patent_title] => Polar code encoding method and encoding apparatus [patent_app_type] => utility [patent_app_number] => 15/629498 [patent_app_country] => US [patent_app_date] => 2017-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 16161 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15629498 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/629498
Polar code encoding method and encoding apparatus Jun 20, 2017 Issued
Array ( [id] => 11975406 [patent_doc_number] => 20170279560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'TRANSMISSION METHOD, TRANSMISSION DEVICE, RECEPTION METHOD, AND RECEPTION DEVICE' [patent_app_type] => utility [patent_app_number] => 15/618404 [patent_app_country] => US [patent_app_date] => 2017-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 27421 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15618404 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/618404
Transmission method, transmission device, reception method, and reception device Jun 8, 2017 Issued
Array ( [id] => 12649773 [patent_doc_number] => 20180108422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => STORAGE DEVICE, MEMORY SYSTEM, AND READ VOLTAGE DECISION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/615849 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15615849 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/615849
Storage device, memory system, and read voltage decision method thereof Jun 6, 2017 Issued
Array ( [id] => 12223135 [patent_doc_number] => 20180061494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'STORAGE DEVICE AND COPY-BACK METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/615043 [patent_app_country] => US [patent_app_date] => 2017-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9632 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15615043 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/615043
Storage device and copy-back method thereof Jun 5, 2017 Issued
Array ( [id] => 15609443 [patent_doc_number] => 10585783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Integrated circuit and application processor [patent_app_type] => utility [patent_app_number] => 15/614715 [patent_app_country] => US [patent_app_date] => 2017-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11053 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15614715 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/614715
Integrated circuit and application processor Jun 5, 2017 Issued
Array ( [id] => 13752363 [patent_doc_number] => 10169128 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-01 [patent_title] => Reduced write status error polling for non-volatile resistive memory device [patent_app_type] => utility [patent_app_number] => 15/613922 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12283 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613922 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/613922
Reduced write status error polling for non-volatile resistive memory device Jun 4, 2017 Issued
Array ( [id] => 13816435 [patent_doc_number] => 10184983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-22 [patent_title] => Interface independent test boot method and apparatus using automatic test equipment [patent_app_type] => utility [patent_app_number] => 15/612785 [patent_app_country] => US [patent_app_date] => 2017-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8998 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15612785 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/612785
Interface independent test boot method and apparatus using automatic test equipment Jun 1, 2017 Issued
Array ( [id] => 14599623 [patent_doc_number] => 10353001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Rapid scan testing of integrated circuit chips [patent_app_type] => utility [patent_app_number] => 15/611047 [patent_app_country] => US [patent_app_date] => 2017-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7033 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15611047 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/611047
Rapid scan testing of integrated circuit chips May 31, 2017 Issued
Array ( [id] => 12917263 [patent_doc_number] => 20180197597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-12 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 15/609219 [patent_app_country] => US [patent_app_date] => 2017-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8584 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15609219 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/609219
Semiconductor devices May 30, 2017 Issued
Array ( [id] => 11958181 [patent_doc_number] => 20170262333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'ERROR CORRECTION CODE UNIT, SELF-TEST METHOD AND ASSOCIATED CONTROLLER APPLIED TO FLASH MEMORY DEVICE FOR GENERATING SOFT INFORMATION' [patent_app_type] => utility [patent_app_number] => 15/608982 [patent_app_country] => US [patent_app_date] => 2017-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4537 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15608982 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/608982
Error correction code unit, self-test method and associated controller applied to flash memory device for generating soft information May 29, 2017 Issued
Array ( [id] => 16373159 [patent_doc_number] => 10804933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => QC LDPC code rate matching method and device therefor [patent_app_type] => utility [patent_app_number] => 16/337193 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 12501 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16337193 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/337193
QC LDPC code rate matching method and device therefor May 25, 2017 Issued
Array ( [id] => 16409214 [patent_doc_number] => 10817773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-27 [patent_title] => Arithmetic processing device and arithmetic processing method [patent_app_type] => utility [patent_app_number] => 16/088979 [patent_app_country] => US [patent_app_date] => 2017-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11047 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16088979 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/088979
Arithmetic processing device and arithmetic processing method May 9, 2017 Issued
Array ( [id] => 13668587 [patent_doc_number] => 10164480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Composite integrated circuits and methods for wireless interactions therewith [patent_app_type] => utility [patent_app_number] => 15/589435 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7884 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15589435 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/589435
Composite integrated circuits and methods for wireless interactions therewith May 7, 2017 Issued
Array ( [id] => 15566227 [patent_doc_number] => 20200067525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => Distributed CRC Polar Codes [patent_app_type] => utility [patent_app_number] => 16/610620 [patent_app_country] => US [patent_app_date] => 2017-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12074 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16610620 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/610620
Distributed CRC polar codes May 3, 2017 Issued
Array ( [id] => 15545119 [patent_doc_number] => 10572340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Solid state disk storage device and method for accessing data in solid state disk storage device [patent_app_type] => utility [patent_app_number] => 15/585858 [patent_app_country] => US [patent_app_date] => 2017-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 7629 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15585858 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/585858
Solid state disk storage device and method for accessing data in solid state disk storage device May 2, 2017 Issued
Array ( [id] => 11855570 [patent_doc_number] => 20170230062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'PARALLEL BIT INTERLEAVER' [patent_app_type] => utility [patent_app_number] => 15/581148 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 57 [patent_no_of_words] => 20653 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15581148 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/581148
Parallel bit interleaver Apr 27, 2017 Issued
Array ( [id] => 12163322 [patent_doc_number] => 20180034588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'APPARATUS AND METHOD FOR DATA TRANSMISSION USING CODED-COMBINING OR HYBRID-CODING' [patent_app_type] => utility [patent_app_number] => 15/478710 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478710 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/478710
APPARATUS AND METHOD FOR DATA TRANSMISSION USING CODED-COMBINING OR HYBRID-CODING Apr 3, 2017 Abandoned
Array ( [id] => 11984657 [patent_doc_number] => 20170288813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'PHY Error Indication Messaging' [patent_app_type] => utility [patent_app_number] => 15/479273 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6630 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15479273 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/479273
PHY error indication messaging Apr 3, 2017 Issued
Array ( [id] => 14954803 [patent_doc_number] => 10438678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Zero test time memory using background built-in self-test [patent_app_type] => utility [patent_app_number] => 15/478666 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4320 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478666 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/478666
Zero test time memory using background built-in self-test Apr 3, 2017 Issued
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