Search

Heidi Riviere Kelley

Supervisory Patent Examiner (ID: 4395, Phone: (571)270-1831 , Office: P/1773 )

Most Active Art Unit
3689
Art Unit(s)
1765, 1773, 3629, 3689, 1783, 1797, 4112
Total Applications
305
Issued Applications
46
Pending Applications
6
Abandoned Applications
256

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7599294 [patent_doc_number] => 07583154 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-09-01 [patent_title] => 'Voltage controlled oscillator' [patent_app_type] => utility [patent_app_number] => 11/241078 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4433 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/583/07583154.pdf [firstpage_image] =>[orig_patent_app_number] => 11241078 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/241078
Voltage controlled oscillator Sep 29, 2005 Issued
Array ( [id] => 5718947 [patent_doc_number] => 20060071720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Oscillation frequency control circuit' [patent_app_type] => utility [patent_app_number] => 11/240830 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3079 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20060071720.pdf [firstpage_image] =>[orig_patent_app_number] => 11240830 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/240830
CPU-based oscillation frequency control circuit eliminating the need for a loop filter Sep 29, 2005 Issued
Array ( [id] => 5169399 [patent_doc_number] => 20070069830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'VOLTAGE-CONTROLLED OSCILLATORS (VCO)' [patent_app_type] => utility [patent_app_number] => 11/162966 [patent_app_country] => US [patent_app_date] => 2005-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3019 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20070069830.pdf [firstpage_image] =>[orig_patent_app_number] => 11162966 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/162966
Negative resistance oscillator with additional bias current injection Sep 28, 2005 Issued
Array ( [id] => 5824244 [patent_doc_number] => 20060061426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-23 [patent_title] => 'Method and circuit for suppressing oscillation modes in ring oscillators' [patent_app_type] => utility [patent_app_number] => 11/234402 [patent_app_country] => US [patent_app_date] => 2005-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2297 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20060061426.pdf [firstpage_image] =>[orig_patent_app_number] => 11234402 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/234402
Method and circuit for suppressing oscillation modes in ring oscillators Sep 22, 2005 Abandoned
Array ( [id] => 915766 [patent_doc_number] => 07327199 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-02-05 [patent_title] => 'Phase-locked loop (PLL) device and method for entering a test mode without a dedicated test pin' [patent_app_type] => utility [patent_app_number] => 11/233963 [patent_app_country] => US [patent_app_date] => 2005-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6700 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/327/07327199.pdf [firstpage_image] =>[orig_patent_app_number] => 11233963 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/233963
Phase-locked loop (PLL) device and method for entering a test mode without a dedicated test pin Sep 22, 2005 Issued
Array ( [id] => 152965 [patent_doc_number] => 07683730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Differential crystal oscillator circuit with peak regulation' [patent_app_type] => utility [patent_app_number] => 11/230587 [patent_app_country] => US [patent_app_date] => 2005-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2218 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/683/07683730.pdf [firstpage_image] =>[orig_patent_app_number] => 11230587 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/230587
Differential crystal oscillator circuit with peak regulation Sep 19, 2005 Issued
Array ( [id] => 5104906 [patent_doc_number] => 20070063781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Voltage controlled oscillator with amplitude control' [patent_app_type] => utility [patent_app_number] => 11/229596 [patent_app_country] => US [patent_app_date] => 2005-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4948 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20070063781.pdf [firstpage_image] =>[orig_patent_app_number] => 11229596 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/229596
Voltage controlled oscillator with amplitude control Sep 19, 2005 Abandoned
Array ( [id] => 233387 [patent_doc_number] => 07598818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-06 [patent_title] => 'Temperature compensation for a voltage-controlled oscillator' [patent_app_type] => utility [patent_app_number] => 11/226051 [patent_app_country] => US [patent_app_date] => 2005-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 4740 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/598/07598818.pdf [firstpage_image] =>[orig_patent_app_number] => 11226051 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/226051
Temperature compensation for a voltage-controlled oscillator Sep 13, 2005 Issued
Array ( [id] => 282411 [patent_doc_number] => 07554412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-30 [patent_title] => 'Phase-locked loop circuit having correction for active filter offset' [patent_app_type] => utility [patent_app_number] => 11/209267 [patent_app_country] => US [patent_app_date] => 2005-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 8207 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/554/07554412.pdf [firstpage_image] =>[orig_patent_app_number] => 11209267 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/209267
Phase-locked loop circuit having correction for active filter offset Aug 21, 2005 Issued
Array ( [id] => 419300 [patent_doc_number] => 07276977 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-02 [patent_title] => 'Circuits and methods for reducing static phase offset using commutating phase detectors' [patent_app_type] => utility [patent_app_number] => 11/200472 [patent_app_country] => US [patent_app_date] => 2005-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 9024 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/276/07276977.pdf [firstpage_image] =>[orig_patent_app_number] => 11200472 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/200472
Circuits and methods for reducing static phase offset using commutating phase detectors Aug 8, 2005 Issued
Array ( [id] => 5880090 [patent_doc_number] => 20060029172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Method and arrangement for generating an output clock signal with an adjustable phase relation from a plurality of input clock signals' [patent_app_type] => utility [patent_app_number] => 11/194494 [patent_app_country] => US [patent_app_date] => 2005-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4533 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20060029172.pdf [firstpage_image] =>[orig_patent_app_number] => 11194494 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/194494
Method and arrangement for generating an output clock signal with an adjustable phase relation from a plurality of input clock signals Jul 31, 2005 Issued
Array ( [id] => 5240248 [patent_doc_number] => 20070018739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Frequency adjustment techniques in coupled LC tank circuits' [patent_app_type] => utility [patent_app_number] => 11/184428 [patent_app_country] => US [patent_app_date] => 2005-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 16135 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20070018739.pdf [firstpage_image] =>[orig_patent_app_number] => 11184428 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/184428
Frequency adjustment techniques in coupled LC tank circuits Jul 18, 2005 Issued
Array ( [id] => 5240249 [patent_doc_number] => 20070018740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Flux linked LC tank circuits forming distributed clock networks' [patent_app_type] => utility [patent_app_number] => 11/185001 [patent_app_country] => US [patent_app_date] => 2005-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 16151 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20070018740.pdf [firstpage_image] =>[orig_patent_app_number] => 11185001 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/185001
Flux linked LC tank circuits forming distributed clock networks Jul 18, 2005 Issued
Array ( [id] => 920297 [patent_doc_number] => 07321269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-22 [patent_title] => 'High frequency ring oscillator with feed-forward paths' [patent_app_type] => utility [patent_app_number] => 11/184352 [patent_app_country] => US [patent_app_date] => 2005-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 3788 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/321/07321269.pdf [firstpage_image] =>[orig_patent_app_number] => 11184352 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/184352
High frequency ring oscillator with feed-forward paths Jul 18, 2005 Issued
Array ( [id] => 5073478 [patent_doc_number] => 20070013453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Circuits and methods for a ring oscillator with adjustable delay and/or resonator tank stage' [patent_app_type] => utility [patent_app_number] => 11/184235 [patent_app_country] => US [patent_app_date] => 2005-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3787 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20070013453.pdf [firstpage_image] =>[orig_patent_app_number] => 11184235 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/184235
Circuits and methods for a ring oscillator with adjustable delay and/or resonator tank stage Jul 17, 2005 Issued
Array ( [id] => 5818448 [patent_doc_number] => 20060022761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Chip-scale atomic clock (CSAC) and method for making same' [patent_app_type] => utility [patent_app_number] => 11/183561 [patent_app_country] => US [patent_app_date] => 2005-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12304 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20060022761.pdf [firstpage_image] =>[orig_patent_app_number] => 11183561 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/183561
Chip-scale atomic clock (CSAC) and method for making same Jul 17, 2005 Abandoned
Array ( [id] => 4649297 [patent_doc_number] => 20080036552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'Method and Circuit Arrangement for the Production of an Output Signal of a Predefined Average Size From a Relatively Larger Input Signal by Pulse-Width Modulated Connection of Said Input Signal' [patent_app_type] => utility [patent_app_number] => 11/660632 [patent_app_country] => US [patent_app_date] => 2005-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1315 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20080036552.pdf [firstpage_image] =>[orig_patent_app_number] => 11660632 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/660632
Method and Circuit Arrangement for the Production of an Output Signal of a Predefined Average Size From a Relatively Larger Input Signal by Pulse-Width Modulated Connection of Said Input Signal Jul 13, 2005 Abandoned
Array ( [id] => 412239 [patent_doc_number] => 07283003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-16 [patent_title] => 'Reset signal generators for a frequency-phase detector and methods of generating reset signals for the same' [patent_app_type] => utility [patent_app_number] => 11/179953 [patent_app_country] => US [patent_app_date] => 2005-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5855 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/283/07283003.pdf [firstpage_image] =>[orig_patent_app_number] => 11179953 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/179953
Reset signal generators for a frequency-phase detector and methods of generating reset signals for the same Jul 11, 2005 Issued
Array ( [id] => 390820 [patent_doc_number] => 07301416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Semiconductor integrated circuit for wireless communication' [patent_app_type] => utility [patent_app_number] => 11/178511 [patent_app_country] => US [patent_app_date] => 2005-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 13759 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/301/07301416.pdf [firstpage_image] =>[orig_patent_app_number] => 11178511 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/178511
Semiconductor integrated circuit for wireless communication Jul 11, 2005 Issued
Array ( [id] => 5676091 [patent_doc_number] => 20060181446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Frequency synthesizer having variable frequency resolution, and fractional-N frequency synthesizing method using sigma-delta modulation of frequency control pulses' [patent_app_type] => utility [patent_app_number] => 11/177131 [patent_app_country] => US [patent_app_date] => 2005-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5459 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20060181446.pdf [firstpage_image] =>[orig_patent_app_number] => 11177131 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/177131
Frequency synthesizer having variable frequency resolution, and fractional-N frequency synthesizing method using sigma-delta modulation of frequency control pulses Jul 7, 2005 Issued
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