Helane Eleanora Myers

Array ( [id] => 737071 [patent_doc_number] => 07039093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Arrangement for adaptive baseband filter selection' [patent_app_type] => utility [patent_app_number] => 10/173463 [patent_app_country] => US [patent_app_date] => 2002-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3452 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/039/07039093.pdf [firstpage_image] =>[orig_patent_app_number] => 10173463 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 742171 [patent_doc_number] => 07035348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-25 [patent_title] => 'Receiver apparatus' [patent_app_type] => utility [patent_app_number] => 10/153655 [patent_app_country] => US [patent_app_date] => 2002-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 6743 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/035/07035348.pdf [firstpage_image] =>[orig_patent_app_number] => 10153655 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6398521 [patent_doc_number] => 20020181640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'PLL (Phase-Locked Loop) circuit' [patent_app_type] => new [patent_app_number] => 10/152851 [patent_app_country] => US [patent_app_date] => 2002-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3001 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20020181640.pdf [firstpage_image] =>[orig_patent_app_number] => 10152851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6868998 [patent_doc_number] => 20030081687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Three-order sigma-delta modulator' [patent_app_type] => new [patent_app_number] => 10/152670 [patent_app_country] => US [patent_app_date] => 2002-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1772 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20030081687.pdf [firstpage_image] =>[orig_patent_app_number] => 10152670 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6868998 [patent_doc_number] => 20030081687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Three-order sigma-delta modulator' [patent_app_type] => new [patent_app_number] => 10/152670 [patent_app_country] => US [patent_app_date] => 2002-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1772 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20030081687.pdf [firstpage_image] =>[orig_patent_app_number] => 10152670 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 750211 [patent_doc_number] => 07027542 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-11 [patent_title] => 'Apparatus and method for providing data transfer between two digital circuits with different clock domains and for solving metastability problems' [patent_app_type] => utility [patent_app_number] => 10/122624 [patent_app_country] => US [patent_app_date] => 2002-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8804 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/027/07027542.pdf [firstpage_image] =>[orig_patent_app_number] => 10122624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 636281 [patent_doc_number] => 07130367 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-10-31 [patent_title] => 'Digital delay lock loop for setup and hold time enhancement' [patent_app_type] => utility [patent_app_number] => 10/120599 [patent_app_country] => US [patent_app_date] => 2002-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1963 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/130/07130367.pdf [firstpage_image] =>[orig_patent_app_number] => 10120599 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6729134 [patent_doc_number] => 20030185324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Systems and methods for optimizing timing phase in modem devices' [patent_app_type] => new [patent_app_number] => 10/113230 [patent_app_country] => US [patent_app_date] => 2002-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1496 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20030185324.pdf [firstpage_image] =>[orig_patent_app_number] => 10113230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6511014 [patent_doc_number] => 20020191725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'Phase comparator' [patent_app_type] => new [patent_app_number] => 10/106899 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5398 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20020191725.pdf [firstpage_image] =>[orig_patent_app_number] => 10106899 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6667911 [patent_doc_number] => 20030112894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Modulator of phase shift keying (PSK) type' [patent_app_type] => new [patent_app_number] => 10/096871 [patent_app_country] => US [patent_app_date] => 2002-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2707 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20030112894.pdf [firstpage_image] =>[orig_patent_app_number] => 10096871 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6638462 [patent_doc_number] => 20030103583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Method and apparatus for multi-level phase shift keying communications' [patent_app_type] => new [patent_app_number] => 10/096150 [patent_app_country] => US [patent_app_date] => 2002-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1912 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20030103583.pdf [firstpage_image] =>[orig_patent_app_number] => 10096150 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 705238 [patent_doc_number] => 07065164 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-06-20 [patent_title] => 'Automatic gain control and wireless communication device' [patent_app_type] => utility [patent_app_number] => 10/070429 [patent_app_country] => US [patent_app_date] => 2000-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5695 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/065/07065164.pdf [firstpage_image] =>[orig_patent_app_number] => 10070429 [rel_patent_id] =>[rel_patent_doc_number] =>)