
Helen C. Kwok
Examiner (ID: 12151, Phone: (571)272-2197 , Office: P/2856 )
| Most Active Art Unit | 2856 |
| Art Unit(s) | 2855, 2856, 2861 |
| Total Applications | 2838 |
| Issued Applications | 2306 |
| Pending Applications | 188 |
| Abandoned Applications | 392 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19123628
[patent_doc_number] => 11967623
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-23
[patent_title] => Semiconductor devices and electronic systems including the same
[patent_app_type] => utility
[patent_app_number] => 17/388233
[patent_app_country] => US
[patent_app_date] => 2021-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 12036
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17388233
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/388233 | Semiconductor devices and electronic systems including the same | Jul 28, 2021 | Issued |
Array
(
[id] => 17203629
[patent_doc_number] => 20210343724
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-04
[patent_title] => SEMICONDUCTOR MEMORY DEVICES INCLUDING SEPARATE UPPER AND LOWER BIT LINE SPACERS AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/374624
[patent_app_country] => US
[patent_app_date] => 2021-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8235
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17374624
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/374624 | Semiconductor memory devices including separate upper and lower bit line spacers and methods of forming the same | Jul 12, 2021 | Issued |
Array
(
[id] => 18125736
[patent_doc_number] => 20230011353
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-12
[patent_title] => CHIP PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/370312
[patent_app_country] => US
[patent_app_date] => 2021-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9617
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370312
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/370312 | Method for forming chip package structure | Jul 7, 2021 | Issued |
Array
(
[id] => 18054114
[patent_doc_number] => 11527509
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-13
[patent_title] => Semiconductor package
[patent_app_type] => utility
[patent_app_number] => 17/364541
[patent_app_country] => US
[patent_app_date] => 2021-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7414
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 294
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364541
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/364541 | Semiconductor package | Jun 29, 2021 | Issued |
Array
(
[id] => 18097458
[patent_doc_number] => 20220415799
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-29
[patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/356199
[patent_app_country] => US
[patent_app_date] => 2021-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5543
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356199
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/356199 | Semiconductor package structure and method for manufacturing the same | Jun 22, 2021 | Issued |
Array
(
[id] => 17886492
[patent_doc_number] => 20220301970
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 17/353798
[patent_app_country] => US
[patent_app_date] => 2021-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14131
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353798
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/353798 | Semiconductor package and method of manufacturing semiconductor package | Jun 20, 2021 | Issued |
Array
(
[id] => 19261029
[patent_doc_number] => 12021096
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-25
[patent_title] => Reliable semiconductor packages
[patent_app_type] => utility
[patent_app_number] => 17/342546
[patent_app_country] => US
[patent_app_date] => 2021-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5861
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17342546
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/342546 | Reliable semiconductor packages | Jun 8, 2021 | Issued |
Array
(
[id] => 17645287
[patent_doc_number] => 20220173026
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-02
[patent_title] => PACKAGE SUBSTRATE FILM AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/340280
[patent_app_country] => US
[patent_app_date] => 2021-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10573
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340280
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/340280 | Package substrate film and semiconductor package including the same | Jun 6, 2021 | Issued |
Array
(
[id] => 18782311
[patent_doc_number] => 11824078
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-11-21
[patent_title] => Microbolometer systems and methods
[patent_app_type] => utility
[patent_app_number] => 17/341348
[patent_app_country] => US
[patent_app_date] => 2021-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 67
[patent_figures_cnt] => 152
[patent_no_of_words] => 26134
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341348
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/341348 | Microbolometer systems and methods | Jun 6, 2021 | Issued |
Array
(
[id] => 19796426
[patent_doc_number] => 12237398
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-25
[patent_title] => Semiconductor device and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/338691
[patent_app_country] => US
[patent_app_date] => 2021-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3088
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338691
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/338691 | Semiconductor device and method for fabricating the same | Jun 3, 2021 | Issued |
Array
(
[id] => 19539496
[patent_doc_number] => 12132053
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-29
[patent_title] => Display device and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/419115
[patent_app_country] => US
[patent_app_date] => 2021-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 7016
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17419115
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/419115 | Display device and method of manufacturing the same | May 27, 2021 | Issued |
Array
(
[id] => 17523114
[patent_doc_number] => 20220108963
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-07
[patent_title] => NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/323076
[patent_app_country] => US
[patent_app_date] => 2021-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9084
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323076
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/323076 | Nonvolatile memory device and method for fabricating the same | May 17, 2021 | Issued |
Array
(
[id] => 17582962
[patent_doc_number] => 20220139817
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-05
[patent_title] => BALL GRID ARRAY PACKAGE AND PACKAGE SUBSTRATE THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/317343
[patent_app_country] => US
[patent_app_date] => 2021-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7521
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17317343
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/317343 | Ball grid array package and package substrate thereof | May 10, 2021 | Issued |
Array
(
[id] => 18983596
[patent_doc_number] => 11908785
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-20
[patent_title] => Semiconductor device and methods of manufacturing semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/238286
[patent_app_country] => US
[patent_app_date] => 2021-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 18
[patent_no_of_words] => 10725
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 240
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17238286
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/238286 | Semiconductor device and methods of manufacturing semiconductor device | Apr 22, 2021 | Issued |
Array
(
[id] => 17811044
[patent_doc_number] => 20220262879
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-18
[patent_title] => ARRAY SUBSTRATE, PREPARATION METHOD, DISPLAY PANEL, AND
DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/597758
[patent_app_country] => US
[patent_app_date] => 2021-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7851
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 310
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17597758
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/597758 | Array substrate, preparation method, display panel, and display device | Apr 8, 2021 | Issued |
Array
(
[id] => 17752742
[patent_doc_number] => 20220230947
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-21
[patent_title] => BACKSIDE POWER DISTRIBUTION NETWORK SEMICONDUCTOR ARCHITECTURE USING DIRECT EPITAXIAL LAYER CONNECTION AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/220664
[patent_app_country] => US
[patent_app_date] => 2021-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7563
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220664
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/220664 | BACKSIDE POWER DISTRIBUTION NETWORK SEMICONDUCTOR ARCHITECTURE USING DIRECT EPITAXIAL LAYER CONNECTION AND METHOD OF MANUFACTURING THE SAME | Mar 31, 2021 | Pending |
Array
(
[id] => 16952041
[patent_doc_number] => 20210210733
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-08
[patent_title] => ORGANIC LIGHT-EMITTING DIODE DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/212003
[patent_app_country] => US
[patent_app_date] => 2021-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9781
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212003
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/212003 | Organic light-emitting diode display device | Mar 24, 2021 | Issued |
Array
(
[id] => 18548433
[patent_doc_number] => 11721795
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-08
[patent_title] => LED matrix driving system
[patent_app_type] => utility
[patent_app_number] => 17/205266
[patent_app_country] => US
[patent_app_date] => 2021-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7908
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17205266
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/205266 | LED matrix driving system | Mar 17, 2021 | Issued |
Array
(
[id] => 18465912
[patent_doc_number] => 11690224
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-27
[patent_title] => Semiconductor device and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/202683
[patent_app_country] => US
[patent_app_date] => 2021-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 44
[patent_no_of_words] => 11276
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202683
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/202683 | Semiconductor device and method of manufacturing the same | Mar 15, 2021 | Issued |
Array
(
[id] => 18343449
[patent_doc_number] => 11640933
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-02
[patent_title] => Ball grid array pattern for an integrated circuit
[patent_app_type] => utility
[patent_app_number] => 17/199025
[patent_app_country] => US
[patent_app_date] => 2021-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8704
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199025
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/199025 | Ball grid array pattern for an integrated circuit | Mar 10, 2021 | Issued |