Search

Helen Lee Pezzuto

Examiner (ID: 6177)

Most Active Art Unit
1713
Art Unit(s)
1501, 1771, 1504, 1713, 1762, 1796, 1314
Total Applications
1545
Issued Applications
1137
Pending Applications
75
Abandoned Applications
333

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18788045 [patent_doc_number] => 20230376442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => Enabling a Multi-Chip Daisy Chain Topology using Peripheral Component Interconnect Express (PCIe) [patent_app_type] => utility [patent_app_number] => 18/363035 [patent_app_country] => US [patent_app_date] => 2023-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8288 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363035 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/363035
Enabling a multi-chip daisy chain topology using peripheral component interconnect express (PCIe) Jul 31, 2023 Issued
Array ( [id] => 19251014 [patent_doc_number] => 20240202004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => PARALLEL PROCESSING DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/361561 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3934 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361561 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361561
PARALLEL PROCESSING DEVICE AND OPERATING METHOD THEREOF Jul 27, 2023 Issued
Array ( [id] => 18941735 [patent_doc_number] => 20240036874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => APPARATUS AND METHOD OF OPTIMISING DIVERGENT PROCESSING IN THREAD GROUPS [patent_app_type] => utility [patent_app_number] => 18/357503 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19027 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357503 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357503
Apparatus and method of optimizing divergent processing in thread groups preliminary class Jul 23, 2023 Issued
Array ( [id] => 20117444 [patent_doc_number] => 12367150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Streaming engine with early and late address and loop count registers to track architectural state [patent_app_type] => utility [patent_app_number] => 18/357748 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 45 [patent_no_of_words] => 20513 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357748 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357748
Streaming engine with early and late address and loop count registers to track architectural state Jul 23, 2023 Issued
Array ( [id] => 18756027 [patent_doc_number] => 20230359472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SENSOR DATA PROCESSING METHOD AND APPARATUS [patent_app_type] => utility [patent_app_number] => 18/356996 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9636 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18356996 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/356996
SENSOR DATA PROCESSING METHOD AND APPARATUS Jul 20, 2023 Pending
Array ( [id] => 19740222 [patent_doc_number] => 12217057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Embedded system [patent_app_type] => utility [patent_app_number] => 18/342150 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3833 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18342150 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/342150
Embedded system Jun 26, 2023 Issued
Array ( [id] => 18614401 [patent_doc_number] => 20230281138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-07 [patent_title] => SOLID STATE DRIVE WITH EXTERNAL SOFTWARE EXECUTION TO EFFECT INTERNAL SOLID-STATE DRIVE OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/196879 [patent_app_country] => US [patent_app_date] => 2023-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6263 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18196879 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/196879
Solid state drive with external software execution to effect internal solid-state drive operations May 11, 2023 Issued
Array ( [id] => 19573787 [patent_doc_number] => 20240378079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => Predictive resource allocation and scheduling for a distributed workload [patent_app_type] => utility [patent_app_number] => 18/313814 [patent_app_country] => US [patent_app_date] => 2023-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18313814 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/313814
Predictive resource allocation and scheduling for a distributed workload May 7, 2023 Issued
Array ( [id] => 18586892 [patent_doc_number] => 20230269157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/310831 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18310831 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/310831
Semiconductor device and operating method thereof May 1, 2023 Issued
Array ( [id] => 19093029 [patent_doc_number] => 11954490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Systems and methods for performing instructions to transform matrices into row-interleaved format [patent_app_type] => utility [patent_app_number] => 18/309469 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 46 [patent_no_of_words] => 26035 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18309469 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/309469
Systems and methods for performing instructions to transform matrices into row-interleaved format Apr 27, 2023 Issued
Array ( [id] => 19544989 [patent_doc_number] => 20240362025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => BUNDLING AND DYNAMIC ALLOCATION OF REGISTER BLOCKS FOR VECTOR INSTRUCTIONS [patent_app_type] => utility [patent_app_number] => 18/140792 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18140792 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/140792
Bundling and dynamic allocation of register blocks for vector instructions Apr 27, 2023 Issued
Array ( [id] => 19099795 [patent_doc_number] => 20240119023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => MULTICORE SYSTEM AND METHOD FOR COMMUNICATION WITHIN THE SAME [patent_app_type] => utility [patent_app_number] => 18/308018 [patent_app_country] => US [patent_app_date] => 2023-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18308018 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/308018
MULTICORE SYSTEM AND METHOD FOR COMMUNICATION WITHIN THE SAME Apr 26, 2023 Abandoned
Array ( [id] => 18711221 [patent_doc_number] => 20230333850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => METHOD AND APPARATUS FOR GENERATING CONTROL INSTRUCTION [patent_app_type] => utility [patent_app_number] => 18/139909 [patent_app_country] => US [patent_app_date] => 2023-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18139909 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/139909
Method and apparatus for generating control instruction Apr 25, 2023 Issued
Array ( [id] => 19949940 [patent_doc_number] => 12321302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Storage device, memory device, and system including storage device and memory device [patent_app_type] => utility [patent_app_number] => 18/132734 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9212 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18132734 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/132734
Storage device, memory device, and system including storage device and memory device Apr 9, 2023 Issued
Array ( [id] => 20265912 [patent_doc_number] => 12436904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Storing feature vectors in one or more memory processing units [patent_app_type] => utility [patent_app_number] => 18/297229 [patent_app_country] => US [patent_app_date] => 2023-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 40 [patent_no_of_words] => 38532 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18297229 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/297229
Storing feature vectors in one or more memory processing units Apr 6, 2023 Issued
Array ( [id] => 19740224 [patent_doc_number] => 12217059 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-02-04 [patent_title] => Systems and methods for programmed branch predictors [patent_app_type] => utility [patent_app_number] => 18/193177 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6297 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18193177 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/193177
Systems and methods for programmed branch predictors Mar 29, 2023 Issued
Array ( [id] => 18630298 [patent_doc_number] => 20230289191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => VERTICAL AND HORIZONTAL BROADCAST OF SHARED OPERANDS [patent_app_type] => utility [patent_app_number] => 18/128642 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18128642 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/128642
Vertical and horizontal broadcast of shared operands Mar 29, 2023 Issued
Array ( [id] => 19581688 [patent_doc_number] => 12147806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Computing 2-body statistics on graphics processing units (GPUs) [patent_app_type] => utility [patent_app_number] => 18/165589 [patent_app_country] => US [patent_app_date] => 2023-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8193 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165589 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/165589
Computing 2-body statistics on graphics processing units (GPUs) Feb 6, 2023 Issued
Array ( [id] => 19334325 [patent_doc_number] => 20240248755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => TRACKING BUFFER REDUCTION AND REUSE IN A PROCESSOR [patent_app_type] => utility [patent_app_number] => 18/099595 [patent_app_country] => US [patent_app_date] => 2023-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8955 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18099595 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/099595
TRACKING BUFFER REDUCTION AND REUSE IN A PROCESSOR Jan 19, 2023 Pending
Array ( [id] => 19320179 [patent_doc_number] => 20240241723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => REGISTER FREEING LATENCY [patent_app_type] => utility [patent_app_number] => 18/096141 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18096141 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/096141
Register freeing latency Jan 11, 2023 Issued
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