Search

Helen Lee Pezzuto

Examiner (ID: 6177)

Most Active Art Unit
1713
Art Unit(s)
1501, 1771, 1504, 1713, 1762, 1796, 1314
Total Applications
1545
Issued Applications
1137
Pending Applications
75
Abandoned Applications
333

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17216509 [patent_doc_number] => 20210349847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => Embedding Rings on a Toroid Computer Network [patent_app_type] => utility [patent_app_number] => 17/211202 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11046 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -32 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17211202 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/211202
Embedding rings on a toroid computer network Mar 23, 2021 Issued
Array ( [id] => 19122369 [patent_doc_number] => 11966351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Network interface device [patent_app_type] => utility [patent_app_number] => 17/199197 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 23763 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199197 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199197
Network interface device Mar 10, 2021 Issued
Array ( [id] => 18248166 [patent_doc_number] => 11604755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Processor socket bridge for input/output extension [patent_app_type] => utility [patent_app_number] => 17/196124 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5622 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196124 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196124
Processor socket bridge for input/output extension Mar 8, 2021 Issued
Array ( [id] => 18095210 [patent_doc_number] => 20220413551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => DOCK FOR PORTABLE ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 17/781560 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8136 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17781560 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/781560
Dock for portable electronic devices Mar 1, 2021 Issued
Array ( [id] => 17892163 [patent_doc_number] => 11455134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Communication between an image forming device and a replaceable supply item [patent_app_type] => utility [patent_app_number] => 17/189192 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5858 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189192 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/189192
Communication between an image forming device and a replaceable supply item Feb 28, 2021 Issued
Array ( [id] => 18015082 [patent_doc_number] => 11507378 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-11-22 [patent_title] => Hardware engine with configurable instructions [patent_app_type] => utility [patent_app_number] => 17/188548 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10038 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17188548 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/188548
Hardware engine with configurable instructions Feb 28, 2021 Issued
Array ( [id] => 17757289 [patent_doc_number] => 11397581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Data transmission system capable of perform union task with a plurality of channel control modules [patent_app_type] => utility [patent_app_number] => 17/185842 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5566 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185842 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185842
Data transmission system capable of perform union task with a plurality of channel control modules Feb 24, 2021 Issued
Array ( [id] => 17629205 [patent_doc_number] => 20220164220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => Circuit for Fast Interrupt Handling [patent_app_type] => utility [patent_app_number] => 17/173108 [patent_app_country] => US [patent_app_date] => 2021-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17173108 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/173108
Circuit for fast interrupt handling Feb 9, 2021 Issued
Array ( [id] => 17907407 [patent_doc_number] => 11461261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/168285 [patent_app_country] => US [patent_app_date] => 2021-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12562 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 337 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17168285 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/168285
Semiconductor memory device Feb 4, 2021 Issued
Array ( [id] => 17172622 [patent_doc_number] => 20210326292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => MULTI-PACKAGE SYSTEM USING CONFIGURABLE INPUT/OUTPUT INTERFACE CIRCUITS FOR SINGLE-ENDED INTRA-PACKAGE COMMUNICATION AND DIFFERENTIAL INTER-PACKAGE COMMUNICATION [patent_app_type] => utility [patent_app_number] => 17/165898 [patent_app_country] => US [patent_app_date] => 2021-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10564 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17165898 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/165898
Multi-package system using configurable input/output interface circuits for single-ended intra-package communication and differential inter-package communication Feb 1, 2021 Issued
Array ( [id] => 18015080 [patent_doc_number] => 11507376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Systems for performing instructions for fast element unpacking into 2-dimensional registers [patent_app_type] => utility [patent_app_number] => 17/152160 [patent_app_country] => US [patent_app_date] => 2021-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 50 [patent_no_of_words] => 26697 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17152160 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/152160
Systems for performing instructions for fast element unpacking into 2-dimensional registers Jan 18, 2021 Issued
Array ( [id] => 18218340 [patent_doc_number] => 11593278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Using machine executing on a NIC to access a third party storage not supported by a NIC or host [patent_app_type] => utility [patent_app_number] => 17/145334 [patent_app_country] => US [patent_app_date] => 2021-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 11194 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17145334 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/145334
Using machine executing on a NIC to access a third party storage not supported by a NIC or host Jan 8, 2021 Issued
Array ( [id] => 17437831 [patent_doc_number] => 11263164 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-01 [patent_title] => Multiple field programmable gate array (FPGA) based multi-legged order transaction processing system and method thereof [patent_app_type] => utility [patent_app_number] => 17/136734 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7833 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136734 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136734
Multiple field programmable gate array (FPGA) based multi-legged order transaction processing system and method thereof Dec 28, 2020 Issued
Array ( [id] => 17507411 [patent_doc_number] => 20220100514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => LOOP SUPPORT EXTENSIONS [patent_app_type] => utility [patent_app_number] => 17/134367 [patent_app_country] => US [patent_app_date] => 2020-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13354 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134367 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/134367
Loop support extensions Dec 25, 2020 Issued
Array ( [id] => 16934654 [patent_doc_number] => 20210200543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => EMBEDDED SYSTEM [patent_app_type] => utility [patent_app_number] => 17/133392 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3833 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17133392 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/133392
Embedded system Dec 22, 2020 Issued
Array ( [id] => 18547006 [patent_doc_number] => 11720358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Embedded system [patent_app_type] => utility [patent_app_number] => 17/133309 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3818 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17133309 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/133309
Embedded system Dec 22, 2020 Issued
Array ( [id] => 17690348 [patent_doc_number] => 20220197641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => PROCESSING PIPELINE WITH ZERO LOOP OVERHEAD [patent_app_type] => utility [patent_app_number] => 17/131970 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131970 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131970
Processing pipeline with zero loop overhead Dec 22, 2020 Issued
Array ( [id] => 17690342 [patent_doc_number] => 20220197635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => INSTRUCTION AND LOGIC FOR SUM OF SQUARE DIFFERENCES [patent_app_type] => utility [patent_app_number] => 17/132464 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132464 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/132464
Instruction and logic for sum of square differences Dec 22, 2020 Issued
Array ( [id] => 18104175 [patent_doc_number] => 11544061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Analog hardware matrix computation [patent_app_type] => utility [patent_app_number] => 17/131034 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5037 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131034 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131034
Analog hardware matrix computation Dec 21, 2020 Issued
Array ( [id] => 17557963 [patent_doc_number] => 11314667 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-04-26 [patent_title] => Real-time processing system synchronization in a control system [patent_app_type] => utility [patent_app_number] => 17/128725 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17128725 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/128725
Real-time processing system synchronization in a control system Dec 20, 2020 Issued
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