
Henry W. Yu
Examiner (ID: 3983)
| Most Active Art Unit | 2181 |
| Art Unit(s) | 2181, 2182 |
| Total Applications | 616 |
| Issued Applications | 385 |
| Pending Applications | 53 |
| Abandoned Applications | 193 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20000813
[patent_doc_number] => 20250139035
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-01
[patent_title] => TRANSMIT AND RECEIVE CIRCUITS WITH MULTIPLE INTERFACES
[patent_app_type] => utility
[patent_app_number] => 19/010323
[patent_app_country] => US
[patent_app_date] => 2025-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19010323
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/010323 | TRANSMIT AND RECEIVE CIRCUITS WITH MULTIPLE INTERFACES | Jan 5, 2025 | Pending |
Array
(
[id] => 19985765
[patent_doc_number] => 20250123987
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-17
[patent_title] => SYSTEM AND METHOD FOR SUPPORTING MULTI-MODE AND/OR MULTI-SPEED NON-VOLATILE MEMORY (NVM) EXPRESS (NVMe) OVER FABRICS (NVMe-oF) DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/990844
[patent_app_country] => US
[patent_app_date] => 2024-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3648
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18990844
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/990844 | SYSTEM AND METHOD FOR SUPPORTING MULTI-MODE AND/OR MULTI-SPEED NON-VOLATILE MEMORY (NVM) EXPRESS (NVMe) OVER FABRICS (NVMe-oF) DEVICES | Dec 19, 2024 | Pending |
Array
(
[id] => 20000807
[patent_doc_number] => 20250139029
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-01
[patent_title] => OFF-MODULE DATA BUFFER
[patent_app_type] => utility
[patent_app_number] => 18/941090
[patent_app_country] => US
[patent_app_date] => 2024-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3432
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18941090
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/941090 | OFF-MODULE DATA BUFFER | Nov 7, 2024 | Pending |
Array
(
[id] => 20018132
[patent_doc_number] => 20250156354
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-15
[patent_title] => INTELLIGENT MOVEMENT OF EXTERNAL CONTENT TO INTERNAL MEMORY
[patent_app_type] => utility
[patent_app_number] => 18/933348
[patent_app_country] => US
[patent_app_date] => 2024-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12190
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18933348
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/933348 | INTELLIGENT MOVEMENT OF EXTERNAL CONTENT TO INTERNAL MEMORY | Oct 30, 2024 | Pending |
Array
(
[id] => 20520358
[patent_doc_number] => 20260044466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-02-12
[patent_title] => SYSTEM AND METHOD FOR REGULATING DIRECT MEMORY ACCESS COMMANDS
[patent_app_type] => utility
[patent_app_number] => 18/904245
[patent_app_country] => US
[patent_app_date] => 2024-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9606
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18904245
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/904245 | SYSTEM AND METHOD FOR REGULATING DIRECT MEMORY ACCESS COMMANDS | Oct 1, 2024 | Pending |
Array
(
[id] => 19711366
[patent_doc_number] => 20250021508
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-16
[patent_title] => METHODS AND APPARATUS TO PREFORM INTER-INTEGRATED CIRCUIT ADDRESS MODIFICATION
[patent_app_type] => utility
[patent_app_number] => 18/896431
[patent_app_country] => US
[patent_app_date] => 2024-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12382
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18896431
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/896431 | METHODS AND APPARATUS TO PREFORM INTER-INTEGRATED CIRCUIT ADDRESS MODIFICATION | Sep 24, 2024 | Pending |
Array
(
[id] => 20601854
[patent_doc_number] => 20260079864
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-03-19
[patent_title] => ROUTING INPUTS ON XR WEARABLE DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/885807
[patent_app_country] => US
[patent_app_date] => 2024-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19736
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18885807
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/885807 | ROUTING INPUTS ON XR WEARABLE DEVICES | Sep 15, 2024 | Pending |
Array
(
[id] => 20513357
[patent_doc_number] => 20260037458
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-02-05
[patent_title] => INSTRUCTIONS USED IN COMMUNICATIONS BETWEEN COMPUTING DEVICE(S) AND A SHARED ADAPTER
[patent_app_type] => utility
[patent_app_number] => 18/791721
[patent_app_country] => US
[patent_app_date] => 2024-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 31373
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791721
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/791721 | INSTRUCTIONS USED IN COMMUNICATIONS BETWEEN COMPUTING DEVICE(S) AND A SHARED ADAPTER | Jul 31, 2024 | Pending |
Array
(
[id] => 19772099
[patent_doc_number] => 20250053525
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-13
[patent_title] => INPUT/OUTPUT EXPANDER REGISTER ADDRESSING
[patent_app_type] => utility
[patent_app_number] => 18/790156
[patent_app_country] => US
[patent_app_date] => 2024-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9569
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790156
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/790156 | INPUT/OUTPUT EXPANDER REGISTER ADDRESSING | Jul 30, 2024 | Pending |
Array
(
[id] => 20703112
[patent_doc_number] => 12625824
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-05-12
[patent_title] => Computer system and mode switching method thereof
[patent_app_type] => utility
[patent_app_number] => 18/786554
[patent_app_country] => US
[patent_app_date] => 2024-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 0
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786554
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/786554 | Computer system and mode switching method thereof | Jul 27, 2024 | Issued |
Array
(
[id] => 19711363
[patent_doc_number] => 20250021505
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-16
[patent_title] => vRAN with PCIe Fronthaul
[patent_app_type] => utility
[patent_app_number] => 18/774601
[patent_app_country] => US
[patent_app_date] => 2024-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6123
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774601
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/774601 | vRAN with PCIe Fronthaul | Jul 15, 2024 | Pending |
Array
(
[id] => 20395465
[patent_doc_number] => 20250370940
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-04
[patent_title] => HOST DEVICE AND DRIVING METHOD
[patent_app_type] => utility
[patent_app_number] => 18/767241
[patent_app_country] => US
[patent_app_date] => 2024-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18767241
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/767241 | HOST DEVICE AND DRIVING METHOD | Jul 8, 2024 | Pending |
Array
(
[id] => 20461067
[patent_doc_number] => 20260010495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-01-08
[patent_title] => DISTRIBUTED RING-BASED INTERCONNECT FOR REGISTER ACCESSIBILITY IN A SYSTEM-ON-CHIP
[patent_app_type] => utility
[patent_app_number] => 18/765063
[patent_app_country] => US
[patent_app_date] => 2024-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8048
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18765063
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/765063 | DISTRIBUTED RING-BASED INTERCONNECT FOR REGISTER ACCESSIBILITY IN A SYSTEM-ON-CHIP | Jul 4, 2024 | Pending |
Array
(
[id] => 19725904
[patent_doc_number] => 20250028655
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-23
[patent_title] => PUSH METHOD FOR PERIPHERAL DEVICE REDIRECTION
[patent_app_type] => utility
[patent_app_number] => 18/745310
[patent_app_country] => US
[patent_app_date] => 2024-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7770
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -30
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18745310
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/745310 | PUSH METHOD FOR PERIPHERAL DEVICE REDIRECTION | Jun 16, 2024 | Pending |
Array
(
[id] => 20689419
[patent_doc_number] => 12619568
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-05-05
[patent_title] => Multi-interface/protocol component management system
[patent_app_type] => utility
[patent_app_number] => 18/744982
[patent_app_country] => US
[patent_app_date] => 2024-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 1181
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 260
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744982
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/744982 | Multi-interface/protocol component management system | Jun 16, 2024 | Issued |
Array
(
[id] => 20323295
[patent_doc_number] => 20250335383
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-30
[patent_title] => FIBRE CHANNEL PROTOCOL EXCHANGE HANDLING
[patent_app_type] => utility
[patent_app_number] => 18/646206
[patent_app_country] => US
[patent_app_date] => 2024-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2415
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646206
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/646206 | FIBRE CHANNEL PROTOCOL EXCHANGE HANDLING | Apr 24, 2024 | Pending |
Array
(
[id] => 20500731
[patent_doc_number] => 20260030192
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-01-29
[patent_title] => Circuit Board of Graphics Processing Unit and Server System
[patent_app_type] => utility
[patent_app_number] => 19/139143
[patent_app_country] => US
[patent_app_date] => 2024-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2608
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 251
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19139143
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/139143 | Circuit Board of Graphics Processing Unit and Server System | Apr 15, 2024 | Pending |
Array
(
[id] => 20290149
[patent_doc_number] => 20250315392
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-09
[patent_title] => DYNAMICALLY ROUTING INPUT/OUTPUT COMMANDS
[patent_app_type] => utility
[patent_app_number] => 18/630208
[patent_app_country] => US
[patent_app_date] => 2024-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2321
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630208
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/630208 | DYNAMICALLY ROUTING INPUT/OUTPUT COMMANDS | Apr 8, 2024 | Pending |
Array
(
[id] => 19482189
[patent_doc_number] => 20240330231
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-03
[patent_title] => COMMUNICATION INTERFACE CHIP AND ADDRESS EXTENSION CIRCUIT THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/616411
[patent_app_country] => US
[patent_app_date] => 2024-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4402
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18616411
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/616411 | COMMUNICATION INTERFACE CHIP AND ADDRESS EXTENSION CIRCUIT THEREOF | Mar 25, 2024 | Pending |
Array
(
[id] => 20249898
[patent_doc_number] => 20250298767
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-25
[patent_title] => SYSTEMS AND METHODS FOR SELECTING AN OPTIMAL COMMUNICATION PATH IN A HETEROGENEOUS COMPUTING PLATFORM
[patent_app_type] => utility
[patent_app_number] => 18/611765
[patent_app_country] => US
[patent_app_date] => 2024-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11435
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18611765
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/611765 | SYSTEMS AND METHODS FOR SELECTING AN OPTIMAL COMMUNICATION PATH IN A HETEROGENEOUS COMPUTING PLATFORM | Mar 20, 2024 | Pending |