
Henry W. Yu
Examiner (ID: 15363, Phone: (571)272-9779 , Office: P/2181 )
| Most Active Art Unit | 2181 |
| Art Unit(s) | 2182, 2181 |
| Total Applications | 622 |
| Issued Applications | 391 |
| Pending Applications | 51 |
| Abandoned Applications | 193 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17507582
[patent_doc_number] => 20220100685
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-31
[patent_title] => METHOD AND APPARATUS FOR OPTIMIZING INPUT LATENCY IN A WIRELESS HUMAN INTERFACE DEVICE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/619469
[patent_app_country] => US
[patent_app_date] => 2019-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5981
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17619469
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/619469 | Method and apparatus for optimizing input latency in a wireless human interface device system | Jun 17, 2019 | Issued |
Array
(
[id] => 17744350
[patent_doc_number] => 11392417
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-19
[patent_title] => Ultraconverged systems having multiple availability zones
[patent_app_type] => utility
[patent_app_number] => 16/437721
[patent_app_country] => US
[patent_app_date] => 2019-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 3712
[patent_no_of_claims] => 56
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437721
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/437721 | Ultraconverged systems having multiple availability zones | Jun 10, 2019 | Issued |
Array
(
[id] => 16979980
[patent_doc_number] => 20210224217
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-22
[patent_title] => A Communication Apparatus
[patent_app_type] => utility
[patent_app_number] => 16/972214
[patent_app_country] => US
[patent_app_date] => 2019-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6424
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16972214
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/972214 | Communication apparatus capable of implementing a selected communication protocol | Jun 6, 2019 | Issued |
Array
(
[id] => 14872681
[patent_doc_number] => 20190286582
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-19
[patent_title] => METHOD FOR PROCESSING CLIENT REQUESTS IN A CLUSTER SYSTEM, A METHOD AND AN APPARATUS FOR PROCESSING I/O ACCORDING TO THE CLIENT REQUESTS
[patent_app_type] => utility
[patent_app_number] => 16/427799
[patent_app_country] => US
[patent_app_date] => 2019-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12261
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16427799
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/427799 | METHOD FOR PROCESSING CLIENT REQUESTS IN A CLUSTER SYSTEM, A METHOD AND AN APPARATUS FOR PROCESSING I/O ACCORDING TO THE CLIENT REQUESTS | May 30, 2019 | Abandoned |
Array
(
[id] => 16454699
[patent_doc_number] => 20200364125
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-19
[patent_title] => METHOD AND SYSTEM FOR COMMUNICATION CHANNELS TO MANAGEMENT CONTROLLER
[patent_app_type] => utility
[patent_app_number] => 16/411994
[patent_app_country] => US
[patent_app_date] => 2019-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6214
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411994
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/411994 | Method and system for communication channels to management controller | May 13, 2019 | Issued |
Array
(
[id] => 16393037
[patent_doc_number] => 20200333978
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-22
[patent_title] => IDENTIFYING PERFORMANCE IMPACT EVENTS IN DATA STORAGE EQUIPMENT BASED ON QUEUE DEPTH METRICS
[patent_app_type] => utility
[patent_app_number] => 16/390534
[patent_app_country] => US
[patent_app_date] => 2019-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8548
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16390534
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/390534 | Identifying performance impact events in data storage equipment based on queue depth metrics | Apr 21, 2019 | Issued |
Array
(
[id] => 16393236
[patent_doc_number] => 20200334177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-22
[patent_title] => HOST SYSTEM DIRECTLY CONNECTED TO INTERNAL SWITCHING FABRIC OF STORAGE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/389383
[patent_app_country] => US
[patent_app_date] => 2019-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18136
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16389383
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/389383 | Host system directly connected to internal switching fabric of storage system | Apr 18, 2019 | Issued |
Array
(
[id] => 14935375
[patent_doc_number] => 20190303325
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-03
[patent_title] => ARBITRATING PORTIONS OF TRANSACTIONS OVER VIRTUAL CHANNELS ASSOCIATED WITH AN INTERCONNECT
[patent_app_type] => utility
[patent_app_number] => 16/368287
[patent_app_country] => US
[patent_app_date] => 2019-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14558
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -43
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16368287
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/368287 | Arbitrating portions of transactions over virtual channels associated with an interconnect | Mar 27, 2019 | Issued |
Array
(
[id] => 14935377
[patent_doc_number] => 20190303326
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-03
[patent_title] => ARBITRATING PORTIONS OF TRANSACTIONS OVER VIRTUAL CHANNELS ASSOCIATED WITH AN INTERCONNECT
[patent_app_type] => utility
[patent_app_number] => 16/368358
[patent_app_country] => US
[patent_app_date] => 2019-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14558
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -28
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16368358
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/368358 | Arbitrating portions of transactions over virtual channels associated with an interconnect | Mar 27, 2019 | Issued |
Array
(
[id] => 14657817
[patent_doc_number] => 20190236037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-01
[patent_title] => LOW PIN-COUNT ARCHITECTURE WITH PRIORITIZED MESSAGE ARBITRATION AND DELIVERY
[patent_app_type] => utility
[patent_app_number] => 16/366789
[patent_app_country] => US
[patent_app_date] => 2019-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8367
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16366789
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/366789 | Low pin-count architecture with prioritized message arbitration and delivery | Mar 26, 2019 | Issued |
Array
(
[id] => 17283158
[patent_doc_number] => 11200187
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-14
[patent_title] => Configuring programmatic interfaces of bus bridges in computer systems
[patent_app_type] => utility
[patent_app_number] => 16/366070
[patent_app_country] => US
[patent_app_date] => 2019-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 3422
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16366070
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/366070 | Configuring programmatic interfaces of bus bridges in computer systems | Mar 26, 2019 | Issued |
Array
(
[id] => 14585625
[patent_doc_number] => 20190220421
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-07-18
[patent_title] => VENDOR-SPECIFIC PERIPHERAL DEVICE CLASS IDENTIFIERS
[patent_app_type] => utility
[patent_app_number] => 16/360427
[patent_app_country] => US
[patent_app_date] => 2019-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8747
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16360427
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/360427 | Vendor-specific peripheral device class identifiers | Mar 20, 2019 | Issued |
Array
(
[id] => 14811021
[patent_doc_number] => 20190272120
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-05
[patent_title] => MEMORY ARRAY ARCHITECTURES FOR MEMORY QUEUES
[patent_app_type] => utility
[patent_app_number] => 16/289841
[patent_app_country] => US
[patent_app_date] => 2019-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13262
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16289841
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/289841 | Memory array architectures for memory queues | Feb 28, 2019 | Issued |
Array
(
[id] => 14472535
[patent_doc_number] => 20190187911
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-20
[patent_title] => DISPERSED BLOOM FILTER FOR DETERMINING PRESENCE OF AN OBJECT
[patent_app_type] => utility
[patent_app_number] => 16/284248
[patent_app_country] => US
[patent_app_date] => 2019-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9151
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 240
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16284248
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/284248 | DISPERSED BLOOM FILTER FOR DETERMINING PRESENCE OF AN OBJECT | Feb 24, 2019 | Abandoned |
Array
(
[id] => 15758001
[patent_doc_number] => 10621114
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-04-14
[patent_title] => Standardized interface for storage using an input/output (I/O) adapter device
[patent_app_type] => utility
[patent_app_number] => 16/258375
[patent_app_country] => US
[patent_app_date] => 2019-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 16859
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258375
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/258375 | Standardized interface for storage using an input/output (I/O) adapter device | Jan 24, 2019 | Issued |
Array
(
[id] => 16801334
[patent_doc_number] => 10996267
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-04
[patent_title] => Time interleaved scan system
[patent_app_type] => utility
[patent_app_number] => 16/255214
[patent_app_country] => US
[patent_app_date] => 2019-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4565
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16255214
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/255214 | Time interleaved scan system | Jan 22, 2019 | Issued |
Array
(
[id] => 16644392
[patent_doc_number] => 10922249
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-16
[patent_title] => Input/output control code filter
[patent_app_type] => utility
[patent_app_number] => 16/248451
[patent_app_country] => US
[patent_app_date] => 2019-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7544
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16248451
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/248451 | Input/output control code filter | Jan 14, 2019 | Issued |
Array
(
[id] => 14657819
[patent_doc_number] => 20190236038
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-01
[patent_title] => BUFFERED INTERCONNECT FOR HIGHLY SCALABLE ON-DIE FABRIC
[patent_app_type] => utility
[patent_app_number] => 16/227364
[patent_app_country] => US
[patent_app_date] => 2018-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13536
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16227364
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/227364 | BUFFERED INTERCONNECT FOR HIGHLY SCALABLE ON-DIE FABRIC | Dec 19, 2018 | Abandoned |
Array
(
[id] => 15183031
[patent_doc_number] => 20190362107
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-28
[patent_title] => ADVANCED PERIPHERAL BUS BASED INTER-INTEGRATED CIRCUIT COMMUNICATION DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/479401
[patent_app_country] => US
[patent_app_date] => 2018-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3112
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16479401
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/479401 | ADVANCED PERIPHERAL BUS BASED INTER-INTEGRATED CIRCUIT COMMUNICATION DEVICE | Dec 18, 2018 | Abandoned |
Array
(
[id] => 16659302
[patent_doc_number] => 20210055939
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-25
[patent_title] => MASTER-SLAVE CONFIGURATION COMMUNICATION PROTOCOL, METHOD FOR IMPROVING COMPATIBILITY, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/042896
[patent_app_country] => US
[patent_app_date] => 2018-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4610
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17042896
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/042896 | Master-slave configuration communication protocol, method for improving compatibility, and electronic device | Dec 10, 2018 | Issued |