Search

Henry W. Yu

Examiner (ID: 15363, Phone: (571)272-9779 , Office: P/2181 )

Most Active Art Unit
2181
Art Unit(s)
2182, 2181
Total Applications
622
Issued Applications
391
Pending Applications
51
Abandoned Applications
193

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15545239 [patent_doc_number] => 10572400 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Shared processing of a packet flow by multiple cores [patent_app_type] => utility [patent_app_number] => 15/623426 [patent_app_country] => US [patent_app_date] => 2017-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4246 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623426 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/623426
Shared processing of a packet flow by multiple cores Jun 14, 2017 Issued
Array ( [id] => 14704625 [patent_doc_number] => 10380060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Low-pincount high-bandwidth memory and memory bus [patent_app_type] => utility [patent_app_number] => 15/618907 [patent_app_country] => US [patent_app_date] => 2017-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 84 [patent_figures_cnt] => 88 [patent_no_of_words] => 16508 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15618907 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/618907
Low-pincount high-bandwidth memory and memory bus Jun 8, 2017 Issued
Array ( [id] => 15758005 [patent_doc_number] => 10621116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Non-volatile storage device with adaptive data bus inversion [patent_app_type] => utility [patent_app_number] => 15/617411 [patent_app_country] => US [patent_app_date] => 2017-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 12221 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15617411 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/617411
Non-volatile storage device with adaptive data bus inversion Jun 7, 2017 Issued
Array ( [id] => 16638001 [patent_doc_number] => 10916516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => High bandwidth memory (HBM) bandwidth aggregation switch [patent_app_type] => utility [patent_app_number] => 15/616004 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 29 [patent_no_of_words] => 12903 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15616004 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/616004
High bandwidth memory (HBM) bandwidth aggregation switch Jun 6, 2017 Issued
Array ( [id] => 17069394 [patent_doc_number] => 20210271610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => SYSTEM AND METHOD FOR OPTIMIZING DRAM BUS SWITCHING USING LLC [patent_app_type] => utility [patent_app_number] => 16/301141 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16301141 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/301141
System and method for optimizing DRAM bus switching using LLC May 11, 2017 Issued
Array ( [id] => 16486334 [patent_doc_number] => 20200379940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => INPUT DATA SWITCHES [patent_app_type] => utility [patent_app_number] => 16/083538 [patent_app_country] => US [patent_app_date] => 2017-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16083538 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/083538
Input data switches Apr 30, 2017 Issued
Array ( [id] => 13390549 [patent_doc_number] => 20180246817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => INPUT/OUTPUT DIRECT MEMORY ACCESS DURING LIVE MEMORY RELOCATION [patent_app_type] => utility [patent_app_number] => 15/444795 [patent_app_country] => US [patent_app_date] => 2017-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6783 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15444795 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/444795
Input/output direct memory access during live memory relocation Feb 27, 2017 Issued
Array ( [id] => 11951100 [patent_doc_number] => 20170255250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-07 [patent_title] => 'SWITCHING POWER SUPPLY FOR SUBUS SLAVES' [patent_app_type] => utility [patent_app_number] => 15/443236 [patent_app_country] => US [patent_app_date] => 2017-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 33662 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15443236 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/443236
Switching power supply for subus slaves Feb 26, 2017 Issued
Array ( [id] => 15425917 [patent_doc_number] => 10545887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Multiple linked list data structure [patent_app_type] => utility [patent_app_number] => 15/442402 [patent_app_country] => US [patent_app_date] => 2017-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6949 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15442402 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/442402
Multiple linked list data structure Feb 23, 2017 Issued
Array ( [id] => 11958240 [patent_doc_number] => 20170262392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'IMAGE PROCESSING APPARATUS, NOTIFICATION MONITORING PROGRAM, AND NOTIFICATION MONITORING METHOD' [patent_app_type] => utility [patent_app_number] => 15/441281 [patent_app_country] => US [patent_app_date] => 2017-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 12954 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15441281 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/441281
Image processing apparatus, notification monitoring program, and notification monitoring method Feb 23, 2017 Issued
Array ( [id] => 11951437 [patent_doc_number] => 20170255588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-07 [patent_title] => 'MULTIPROTOCOL I3C COMMON COMMAND CODES' [patent_app_type] => utility [patent_app_number] => 15/442164 [patent_app_country] => US [patent_app_date] => 2017-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13369 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15442164 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/442164
MULTIPROTOCOL I3C COMMON COMMAND CODES Feb 23, 2017 Abandoned
Array ( [id] => 14982177 [patent_doc_number] => 10444999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-15 [patent_title] => Universal flash storage (UFS) host design for supporting embedded UFS and UFS card [patent_app_type] => utility [patent_app_number] => 15/292675 [patent_app_country] => US [patent_app_date] => 2016-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5111 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15292675 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/292675
Universal flash storage (UFS) host design for supporting embedded UFS and UFS card Oct 12, 2016 Issued
Array ( [id] => 14457821 [patent_doc_number] => 10324872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Interrupt-vector translation lookaside buffer [patent_app_type] => utility [patent_app_number] => 15/270726 [patent_app_country] => US [patent_app_date] => 2016-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4953 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15270726 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/270726
Interrupt-vector translation lookaside buffer Sep 19, 2016 Issued
Array ( [id] => 15854955 [patent_doc_number] => 10642763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Quality of service policy sets [patent_app_type] => utility [patent_app_number] => 15/270973 [patent_app_country] => US [patent_app_date] => 2016-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 16168 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15270973 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/270973
Quality of service policy sets Sep 19, 2016 Issued
Array ( [id] => 12262650 [patent_doc_number] => 20180081846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'FIRM CHANNEL PATHS' [patent_app_type] => utility [patent_app_number] => 15/268683 [patent_app_country] => US [patent_app_date] => 2016-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9766 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15268683 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/268683
Firm channel paths Sep 18, 2016 Issued
Array ( [id] => 12262649 [patent_doc_number] => 20180081845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'Crossbar Switch' [patent_app_type] => utility [patent_app_number] => 15/267786 [patent_app_country] => US [patent_app_date] => 2016-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3479 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15267786 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/267786
Crossbar switch with pipeline delay registers Sep 15, 2016 Issued
Array ( [id] => 12262644 [patent_doc_number] => 20180081840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'METHODS AND APPARATUS FOR PERFORMING PARTIAL RECONFIGURATION IN A PIPELINE-BASED NETWORK TOPOLOGY' [patent_app_type] => utility [patent_app_number] => 15/268281 [patent_app_country] => US [patent_app_date] => 2016-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6112 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15268281 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/268281
Methods and apparatus for performing partial reconfiguration in a pipeline-based network topology Sep 15, 2016 Issued
Array ( [id] => 12242124 [patent_doc_number] => 20180074987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'AUTOMATED RETROFIT INSTALLATION TOOL FOR REPLACEMENT OF ONE OR MORE PRE-EXISTING DEDICATED INPUT/OUTPUT (I/O) MODULES AND TERMINAL BOARDS WITH ONE OR MORE UNIVERSAL I/O MODULES' [patent_app_type] => utility [patent_app_number] => 15/266447 [patent_app_country] => US [patent_app_date] => 2016-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7412 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15266447 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/266447
Automated retrofit installation tool for replacement of one or more pre-existing dedicated input/output (I/O) modules and terminal boards with one or more universal I/O modules Sep 14, 2016 Issued
Array ( [id] => 12194682 [patent_doc_number] => 09898412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Methods, systems and apparatus for predicting the way of a set associative cache' [patent_app_type] => utility [patent_app_number] => 15/257593 [patent_app_country] => US [patent_app_date] => 2016-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5411 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15257593 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/257593
Methods, systems and apparatus for predicting the way of a set associative cache Sep 5, 2016 Issued
Array ( [id] => 11816920 [patent_doc_number] => 09720871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-01 [patent_title] => 'Determining cable connections in a multi-cable link' [patent_app_type] => utility [patent_app_number] => 15/249514 [patent_app_country] => US [patent_app_date] => 2016-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8903 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 554 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15249514 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/249514
Determining cable connections in a multi-cable link Aug 28, 2016 Issued
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