Search

Herbert Kerner

Examiner (ID: 12458)

Most Active Art Unit
2105
Art Unit(s)
2852, 2105
Total Applications
88
Issued Applications
80
Pending Applications
0
Abandoned Applications
8

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9794877 [patent_doc_number] => 20150006821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'EVICT ON WRITE, A MANAGEMENT STRATEGY FOR A PREFETCH UNIT AND/OR FIRST LEVEL CACHE IN A MULTIPROCESSOR SYSTEM WITH SPECULATIVE EXECUTION' [patent_app_type] => utility [patent_app_number] => 14/486413 [patent_app_country] => US [patent_app_date] => 2014-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8063 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14486413 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/486413
EVICT ON WRITE, A MANAGEMENT STRATEGY FOR A PREFETCH UNIT AND/OR FIRST LEVEL CACHE IN A MULTIPROCESSOR SYSTEM WITH SPECULATIVE EXECUTION Sep 14, 2014 Abandoned
Array ( [id] => 11708771 [patent_doc_number] => 20170177270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/129480 [patent_app_country] => US [patent_app_date] => 2014-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6745 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15129480 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/129480
Storage system with read request accelerator having dynamic internal data memory allocation Sep 10, 2014 Issued
Array ( [id] => 12351891 [patent_doc_number] => 09952805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => Storage system and data write method using a logical volume to either store data successfully onto a first memory or send a failure response to a server computer if the storage attempt fails [patent_app_type] => utility [patent_app_number] => 15/119860 [patent_app_country] => US [patent_app_date] => 2014-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 17550 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15119860 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/119860
Storage system and data write method using a logical volume to either store data successfully onto a first memory or send a failure response to a server computer if the storage attempt fails Sep 10, 2014 Issued
Array ( [id] => 10716621 [patent_doc_number] => 20160062768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-03 [patent_title] => 'INSTRUCTION AND LOGIC FOR PREFETCHER THROTTLING BASED ON DATA SOURCE' [patent_app_type] => utility [patent_app_number] => 14/471261 [patent_app_country] => US [patent_app_date] => 2014-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 20274 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14471261 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/471261
Instruction and logic for prefetcher throttling based on counts of memory accesses to data sources Aug 27, 2014 Issued
Array ( [id] => 10470826 [patent_doc_number] => 20150355841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/471070 [patent_app_country] => US [patent_app_date] => 2014-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9128 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14471070 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/471070
Memory system utilizing a connection condition of an interface to transmit data Aug 27, 2014 Issued
Array ( [id] => 10630367 [patent_doc_number] => 09348517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-24 [patent_title] => 'Using a migration threshold and a candidate list for cache management of sequential write storage' [patent_app_type] => utility [patent_app_number] => 14/471438 [patent_app_country] => US [patent_app_date] => 2014-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5777 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14471438 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/471438
Using a migration threshold and a candidate list for cache management of sequential write storage Aug 27, 2014 Issued
Array ( [id] => 10235998 [patent_doc_number] => 20150120993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'INFORMATION PROCESSING APPARATUS, STORAGE DEVICE CONTROL CIRCUIT, AND STORAGE DEVICE CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/471041 [patent_app_country] => US [patent_app_date] => 2014-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10366 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14471041 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/471041
INFORMATION PROCESSING APPARATUS, STORAGE DEVICE CONTROL CIRCUIT, AND STORAGE DEVICE CONTROL METHOD Aug 27, 2014 Abandoned
Array ( [id] => 10716734 [patent_doc_number] => 20160062881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-03 [patent_title] => 'METABLOCK RELINKING SCHEME IN ADAPTIVE WEAR LEVELING' [patent_app_type] => utility [patent_app_number] => 14/471465 [patent_app_country] => US [patent_app_date] => 2014-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8408 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14471465 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/471465
Metalblock relinking to physical blocks of semiconductor memory in adaptive wear leveling based on health Aug 27, 2014 Issued
Array ( [id] => 10369172 [patent_doc_number] => 20150254177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/471091 [patent_app_country] => US [patent_app_date] => 2014-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3917 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14471091 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/471091
Memory system which transfers management information between first and second memories in a burst mode before a read process is performed on a third memory Aug 27, 2014 Issued
Array ( [id] => 10041052 [patent_doc_number] => 09081758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Using persistent memory regions within memory devices to collect serial presence detect and performance data' [patent_app_type] => utility [patent_app_number] => 14/461662 [patent_app_country] => US [patent_app_date] => 2014-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 6777 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14461662 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/461662
Using persistent memory regions within memory devices to collect serial presence detect and performance data Aug 17, 2014 Issued
Array ( [id] => 10177671 [patent_doc_number] => 09207875 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'System and method for retaining deduplication in a storage object after a clone split operation' [patent_app_type] => utility [patent_app_number] => 14/457332 [patent_app_country] => US [patent_app_date] => 2014-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 16964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14457332 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/457332
System and method for retaining deduplication in a storage object after a clone split operation Aug 11, 2014 Issued
Array ( [id] => 11056142 [patent_doc_number] => 20160253104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'TECHNIQUES FOR AUTOMATICALLY FREEING SPACE IN A LOG-STRUCTURED STORAGE SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/767387 [patent_app_country] => US [patent_app_date] => 2014-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6169 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14767387 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/767387
Techniques for automatically freeing space in a log-structured storage system based on segment fragmentation Jun 26, 2014 Issued
Array ( [id] => 10131060 [patent_doc_number] => 09164895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'Virtualization of solid state drive and mass storage drive devices with hot and cold application monitoring' [patent_app_type] => utility [patent_app_number] => 14/314446 [patent_app_country] => US [patent_app_date] => 2014-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6243 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14314446 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/314446
Virtualization of solid state drive and mass storage drive devices with hot and cold application monitoring Jun 24, 2014 Issued
Array ( [id] => 10976948 [patent_doc_number] => 20140379983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-25 [patent_title] => 'STORAGE SYSTEM, CONTROL APPARATUS, AND CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/293394 [patent_app_country] => US [patent_app_date] => 2014-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 18331 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14293394 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/293394
STORAGE SYSTEM, CONTROL APPARATUS, AND CONTROL METHOD Jun 1, 2014 Abandoned
Array ( [id] => 12047120 [patent_doc_number] => 09824728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-21 [patent_title] => 'Method for performing memory interface calibration in an electronic device, and associated apparatus and associated memory controller' [patent_app_type] => utility [patent_app_number] => 14/294094 [patent_app_country] => US [patent_app_date] => 2014-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9746 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14294094 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/294094
Method for performing memory interface calibration in an electronic device, and associated apparatus and associated memory controller Jun 1, 2014 Issued
Array ( [id] => 10462292 [patent_doc_number] => 20150347307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'CACHE ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 14/293521 [patent_app_country] => US [patent_app_date] => 2014-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4949 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14293521 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/293521
Cache architecture for comparing data Jun 1, 2014 Issued
Array ( [id] => 9810971 [patent_doc_number] => 20150022917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'ADAPTING TRANSFER RATE OF CACHED DATA TO PREVENT STOPPAGE OF DATA TRANSMISSION' [patent_app_type] => utility [patent_app_number] => 14/289883 [patent_app_country] => US [patent_app_date] => 2014-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14289883 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/289883
Adapting transfer rate of cached data to prevent stoppage of data transmission May 28, 2014 Issued
Array ( [id] => 10969642 [patent_doc_number] => 20140372675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'INFORMATION PROCESSING APPARATUS, CONTROL CIRCUIT, AND CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 14/289680 [patent_app_country] => US [patent_app_date] => 2014-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 18857 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14289680 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/289680
INFORMATION PROCESSING APPARATUS, CONTROL CIRCUIT, AND CONTROL METHOD May 28, 2014 Abandoned
Array ( [id] => 14642183 [patent_doc_number] => 10365835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => Apparatuses and methods for performing write count threshold wear leveling operations [patent_app_type] => utility [patent_app_number] => 14/288663 [patent_app_country] => US [patent_app_date] => 2014-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4048 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14288663 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/288663
Apparatuses and methods for performing write count threshold wear leveling operations May 27, 2014 Issued
Array ( [id] => 10651204 [patent_doc_number] => 09367456 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-06-14 [patent_title] => 'Integrated circuit and method for accessing segments of a cache line in arrays of storage elements of a folded cache' [patent_app_type] => utility [patent_app_number] => 14/288739 [patent_app_country] => US [patent_app_date] => 2014-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14288739 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/288739
Integrated circuit and method for accessing segments of a cache line in arrays of storage elements of a folded cache May 27, 2014 Issued
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