| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3432057
[patent_doc_number] => 05455445
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-03
[patent_title] => 'Multi-level semiconductor structures having environmentally isolated elements'
[patent_app_type] => 1
[patent_app_number] => 8/185112
[patent_app_country] => US
[patent_app_date] => 1994-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 2318
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/455/05455445.pdf
[firstpage_image] =>[orig_patent_app_number] => 185112
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/185112 | Multi-level semiconductor structures having environmentally isolated elements | Jan 20, 1994 | Issued |
Array
(
[id] => 3476315
[patent_doc_number] => 05477082
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-19
[patent_title] => 'Bi-planar multi-chip module'
[patent_app_type] => 1
[patent_app_number] => 8/179904
[patent_app_country] => US
[patent_app_date] => 1994-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4594
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/477/05477082.pdf
[firstpage_image] =>[orig_patent_app_number] => 179904
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/179904 | Bi-planar multi-chip module | Jan 10, 1994 | Issued |
| 08/180823 | CONDUCTIVE LAYER CONNECTION STRUCTURE OF A SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THEREOF | Jan 6, 1994 | Abandoned |
Array
(
[id] => 3461756
[patent_doc_number] => 05473193
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Package for parallel subelement semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 8/177974
[patent_app_country] => US
[patent_app_date] => 1994-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1663
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/473/05473193.pdf
[firstpage_image] =>[orig_patent_app_number] => 177974
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/177974 | Package for parallel subelement semiconductor devices | Jan 5, 1994 | Issued |
Array
(
[id] => 3463910
[patent_doc_number] => 05442232
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-15
[patent_title] => 'Thin semiconductor package having many pins and likely to dissipate heat'
[patent_app_type] => 1
[patent_app_number] => 8/172186
[patent_app_country] => US
[patent_app_date] => 1993-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 5038
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/442/05442232.pdf
[firstpage_image] =>[orig_patent_app_number] => 172186
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/172186 | Thin semiconductor package having many pins and likely to dissipate heat | Dec 22, 1993 | Issued |
Array
(
[id] => 3484682
[patent_doc_number] => 05457343
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-10
[patent_title] => 'Carbon nanotubule enclosing a foreign material'
[patent_app_type] => 1
[patent_app_number] => 8/170806
[patent_app_country] => US
[patent_app_date] => 1993-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 7176
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/457/05457343.pdf
[firstpage_image] =>[orig_patent_app_number] => 170806
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/170806 | Carbon nanotubule enclosing a foreign material | Dec 20, 1993 | Issued |
| 08/149670 | CRATER PREVENTION TECHNIQUE FOR SEMICONDUCTOR PROCESSING | Dec 19, 1993 | Abandoned |
| 08/166890 | BIPOLAR TRANSISTOR | Dec 14, 1993 | Abandoned |
Array
(
[id] => 3491407
[patent_doc_number] => 05406512
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-11
[patent_title] => 'Semiconductor memory device using compensation capacitors'
[patent_app_type] => 1
[patent_app_number] => 8/166158
[patent_app_country] => US
[patent_app_date] => 1993-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3260
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/406/05406512.pdf
[firstpage_image] =>[orig_patent_app_number] => 166158
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/166158 | Semiconductor memory device using compensation capacitors | Dec 12, 1993 | Issued |
Array
(
[id] => 3422316
[patent_doc_number] => 05434432
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-18
[patent_title] => 'Antifuse device for controlling current in a circuit using an antifuse'
[patent_app_type] => 1
[patent_app_number] => 8/161718
[patent_app_country] => US
[patent_app_date] => 1993-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1300
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/434/05434432.pdf
[firstpage_image] =>[orig_patent_app_number] => 161718
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/161718 | Antifuse device for controlling current in a circuit using an antifuse | Dec 2, 1993 | Issued |
| 08/160287 | SEMICONDUCTOR MEMORY DEVICE HAVING CAPACITOR OF THIN FILM TRANSISTOR STRUCTURE | Dec 1, 1993 | Abandoned |
Array
(
[id] => 3124436
[patent_doc_number] => 05381046
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-10
[patent_title] => 'Stacked conductive resistive polysilicon lands in multilevel semiconductor chips'
[patent_app_type] => 1
[patent_app_number] => 8/160470
[patent_app_country] => US
[patent_app_date] => 1993-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 6541
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/381/05381046.pdf
[firstpage_image] =>[orig_patent_app_number] => 160470
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/160470 | Stacked conductive resistive polysilicon lands in multilevel semiconductor chips | Nov 30, 1993 | Issued |
Array
(
[id] => 3413254
[patent_doc_number] => 05438219
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-01
[patent_title] => 'Double-sided oscillator package and method of coupling components thereto'
[patent_app_type] => 1
[patent_app_number] => 8/160008
[patent_app_country] => US
[patent_app_date] => 1993-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2676
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/438/05438219.pdf
[firstpage_image] =>[orig_patent_app_number] => 160008
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/160008 | Double-sided oscillator package and method of coupling components thereto | Nov 29, 1993 | Issued |
| 08/159308 | SEMICONDUCTOR PACKAGE DEVICE WITH LEAD BEING CUT ALONG RESIN MOLD SURFACE AND WITH CONCAVE EXPOSED PORTION FORMED THEREIN | Nov 29, 1993 | Abandoned |
Array
(
[id] => 3493681
[patent_doc_number] => 05471080
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-28
[patent_title] => 'Field effect transistor with a shaped gate electrode'
[patent_app_type] => 1
[patent_app_number] => 8/158257
[patent_app_country] => US
[patent_app_date] => 1993-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 32
[patent_no_of_words] => 5807
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 227
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/471/05471080.pdf
[firstpage_image] =>[orig_patent_app_number] => 158257
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/158257 | Field effect transistor with a shaped gate electrode | Nov 28, 1993 | Issued |
| 08/156646 | MULTI-LAYER WIRING AND PRODUCTION METHOD THEREOF | Nov 23, 1993 | Abandoned |
| 08/149940 | SEMICONDUCTOR INTEGRATED CIRCUIT PACKAGE, A PRODUCTION METHOD THEREFOR, AND A MOUNTING METHOD THEREOF | Nov 9, 1993 | Abandoned |
Array
(
[id] => 3500738
[patent_doc_number] => 05532505
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-02
[patent_title] => 'Field effect transistor including a cap with a doped layer formed therein'
[patent_app_type] => 1
[patent_app_number] => 8/150349
[patent_app_country] => US
[patent_app_date] => 1993-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 14
[patent_no_of_words] => 3066
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/532/05532505.pdf
[firstpage_image] =>[orig_patent_app_number] => 150349
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/150349 | Field effect transistor including a cap with a doped layer formed therein | Nov 9, 1993 | Issued |
Array
(
[id] => 3496360
[patent_doc_number] => 05561321
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-01
[patent_title] => 'Ceramic-metal composite structure and process of producing same'
[patent_app_type] => 1
[patent_app_number] => 8/146086
[patent_app_country] => US
[patent_app_date] => 1993-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 15405
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/561/05561321.pdf
[firstpage_image] =>[orig_patent_app_number] => 146086
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/146086 | Ceramic-metal composite structure and process of producing same | Nov 7, 1993 | Issued |
| 08/147300 | INTEGRATED TRIGGER INJECTOR FOR AVALANCHE SEMICONDUCTOR SWITCH DEVICES | Nov 4, 1993 | Abandoned |
