Search

Hien N. Nguyen

Examiner (ID: 502, Phone: (571)272-1879 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2825, 2824, 2818, 2511
Total Applications
1992
Issued Applications
1913
Pending Applications
57
Abandoned Applications
40

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17477086 [patent_doc_number] => 20220084590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => SENSE AMPLIFIER CIRCUIT FOR PREVENTING READ DISTURB [patent_app_type] => utility [patent_app_number] => 17/143112 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6322 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17143112 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/143112
Sense amplifier circuit for preventing read disturb Jan 5, 2021 Issued
Array ( [id] => 17224489 [patent_doc_number] => 11176999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/142860 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 72 [patent_no_of_words] => 27579 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142860 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142860
Semiconductor memory device Jan 5, 2021 Issued
Array ( [id] => 18248831 [patent_doc_number] => 11605427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => Memory device with write pulse trimming [patent_app_type] => utility [patent_app_number] => 17/140605 [patent_app_country] => US [patent_app_date] => 2021-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5035 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140605 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/140605
Memory device with write pulse trimming Jan 3, 2021 Issued
Array ( [id] => 16904525 [patent_doc_number] => 20210183441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => EFFICIENT UTILIZATION OF MEMORY DIE AREA [patent_app_type] => utility [patent_app_number] => 17/130210 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17928 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17130210 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/130210
Efficient utilization of memory die area Dec 21, 2020 Issued
Array ( [id] => 17447833 [patent_doc_number] => 20220068338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => RACE-TRACK MEMORY WITH IMPROVED DOMAIN WALL MOTION CONTROL [patent_app_type] => utility [patent_app_number] => 17/127732 [patent_app_country] => US [patent_app_date] => 2020-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10753 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17127732 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/127732
Race-track memory with improved domain wall motion control Dec 17, 2020 Issued
Array ( [id] => 18120352 [patent_doc_number] => 11551750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Enhanced state dual memory cell [patent_app_type] => utility [patent_app_number] => 17/118952 [patent_app_country] => US [patent_app_date] => 2020-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7335 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17118952 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/118952
Enhanced state dual memory cell Dec 10, 2020 Issued
Array ( [id] => 16920128 [patent_doc_number] => 20210193220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => PHASE CHANGE MEMORY DEVICE, SYSTEM INCLUDING THE MEMORY DEVICE, AND METHOD FOR OPERATING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/119979 [patent_app_country] => US [patent_app_date] => 2020-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 454 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17119979 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/119979
Phase change memory device, system including the memory device, and method for operating the memory device Dec 10, 2020 Issued
Array ( [id] => 18137101 [patent_doc_number] => 11562789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Multiplexer for memory [patent_app_type] => utility [patent_app_number] => 17/117713 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9628 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17117713 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/117713
Multiplexer for memory Dec 9, 2020 Issued
Array ( [id] => 18235761 [patent_doc_number] => 11600325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Non volatile resistive memory logic device [patent_app_type] => utility [patent_app_number] => 17/109296 [patent_app_country] => US [patent_app_date] => 2020-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 14441 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17109296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/109296
Non volatile resistive memory logic device Dec 1, 2020 Issued
Array ( [id] => 16716026 [patent_doc_number] => 20210083173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => MULTI-RESISTANCE MRAM [patent_app_type] => utility [patent_app_number] => 17/109291 [patent_app_country] => US [patent_app_date] => 2020-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17109291 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/109291
Multi-resistance MRAM Dec 1, 2020 Issued
Array ( [id] => 16858102 [patent_doc_number] => 20210158847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => MEMORY DEVICE INCLUDING PLURALITY OF LATCHES AND SYSTEM ON CHIP INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/104592 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7686 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17104592 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/104592
Memory device including plurality of latches and system on chip including the same Nov 24, 2020 Issued
Array ( [id] => 16660379 [patent_doc_number] => 20210057016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => SEMICONDUCTOR MEMORY DEVICE HAVING CLOCK GENERATION SCHEME BASED ON COMMAND [patent_app_type] => utility [patent_app_number] => 17/093786 [patent_app_country] => US [patent_app_date] => 2020-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8813 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17093786 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/093786
Semiconductor memory device having clock generation scheme based on command Nov 9, 2020 Issued
Array ( [id] => 16677074 [patent_doc_number] => 20210065840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => DATA REDIRECTION UPON FAILURE OF A PROGRAM OPERATION [patent_app_type] => utility [patent_app_number] => 17/091252 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17091252 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/091252
Data redirection upon failure of a program operation Nov 5, 2020 Issued
Array ( [id] => 18331633 [patent_doc_number] => 11636883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Semiconductor device and system using the same [patent_app_type] => utility [patent_app_number] => 17/086742 [patent_app_country] => US [patent_app_date] => 2020-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 79 [patent_no_of_words] => 39230 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17086742 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/086742
Semiconductor device and system using the same Nov 1, 2020 Issued
Array ( [id] => 17469993 [patent_doc_number] => 11276475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Memory device and method of operating the memory device [patent_app_type] => utility [patent_app_number] => 17/084204 [patent_app_country] => US [patent_app_date] => 2020-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 9889 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17084204 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/084204
Memory device and method of operating the memory device Oct 28, 2020 Issued
Array ( [id] => 16659385 [patent_doc_number] => 20210056022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => MEMORY MAPPING FOR HIBERNATION [patent_app_type] => utility [patent_app_number] => 17/076333 [patent_app_country] => US [patent_app_date] => 2020-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7938 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17076333 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/076333
Memory mapping for hibernation Oct 20, 2020 Issued
Array ( [id] => 17900533 [patent_doc_number] => 20220310195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => TRIPLE MODULAR REDUNDANCY FOR FAULT-TOLERANT IN-MEMORY COMPUTING [patent_app_type] => utility [patent_app_number] => 17/609577 [patent_app_country] => US [patent_app_date] => 2020-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12998 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17609577 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/609577
Triple modular redundancy for fault-tolerant in-memory computing Oct 12, 2020 Issued
Array ( [id] => 16827550 [patent_doc_number] => 20210142843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY [patent_app_type] => utility [patent_app_number] => 17/063167 [patent_app_country] => US [patent_app_date] => 2020-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17063167 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/063167
Apparatuses and methods for performing logical operations using sensing circuitry Oct 4, 2020 Issued
Array ( [id] => 18016133 [patent_doc_number] => 11508436 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 17/037492 [patent_app_country] => US [patent_app_date] => 2020-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 8918 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17037492 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/037492
Memory device Sep 28, 2020 Issued
Array ( [id] => 16730924 [patent_doc_number] => 20210098072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => NONVOLATILE MEMORY DEVICE WITH ADDRESS RE-MAPPING [patent_app_type] => utility [patent_app_number] => 17/022967 [patent_app_country] => US [patent_app_date] => 2020-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17022967 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/022967
Nonvolatile memory device with address re-mapping Sep 15, 2020 Issued
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