Search

Hien N. Nguyen

Examiner (ID: 502, Phone: (571)272-1879 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2825, 2824, 2818, 2511
Total Applications
1992
Issued Applications
1913
Pending Applications
57
Abandoned Applications
40

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19773125 [patent_doc_number] => 20250054551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => MEMORY DEVICE AND OPERATING METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/425195 [patent_app_country] => US [patent_app_date] => 2024-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18425195 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/425195
Memory device and operating method of memory device Jan 28, 2024 Issued
Array ( [id] => 19145987 [patent_doc_number] => 20240145002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => MEMORY DEVICE HAVING PHYSICAL UNCLONABLE FUNCTION AND MEMORY SYSTEM INCLUDING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/407399 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407399 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/407399
Memory device having physical unclonable function and memory system including the memory device Jan 7, 2024 Issued
Array ( [id] => 20132078 [patent_doc_number] => 12374395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Resistive memory apparatus and operating method thereof and memory cell array thereof [patent_app_type] => utility [patent_app_number] => 18/399609 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399609 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399609
Resistive memory apparatus and operating method thereof and memory cell array thereof Dec 27, 2023 Issued
Array ( [id] => 20132078 [patent_doc_number] => 12374395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Resistive memory apparatus and operating method thereof and memory cell array thereof [patent_app_type] => utility [patent_app_number] => 18/399609 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399609 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399609
Resistive memory apparatus and operating method thereof and memory cell array thereof Dec 27, 2023 Issued
Array ( [id] => 20332574 [patent_doc_number] => 12462858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => In-memory computation device having improved drift compensation [patent_app_type] => utility [patent_app_number] => 18/542938 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 10304 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542938 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/542938
In-memory computation device having improved drift compensation Dec 17, 2023 Issued
Array ( [id] => 20305208 [patent_doc_number] => 12451204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Memory device supporting word line holding operation and operating method of the same [patent_app_type] => utility [patent_app_number] => 18/534731 [patent_app_country] => US [patent_app_date] => 2023-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3760 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18534731 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/534731
Memory device supporting word line holding operation and operating method of the same Dec 10, 2023 Issued
Array ( [id] => 19591913 [patent_doc_number] => 20240389470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => NONVOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/531200 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8684 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531200 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531200
NONVOLATILE MEMORY DEVICE Dec 5, 2023 Pending
Array ( [id] => 19237035 [patent_doc_number] => 20240194230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => METHOD FOR NAND FLASH MEMORY TO COMPLETE CONVOLUTION OPERATION OF MULTI-BIT DATA [patent_app_type] => utility [patent_app_number] => 18/524840 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524840 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/524840
Method for NAND flash memory to complete convolution operation of multi-bit data Nov 29, 2023 Issued
Array ( [id] => 19873555 [patent_doc_number] => 12266424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Memory circuit and method of operating same [patent_app_type] => utility [patent_app_number] => 18/521476 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15681 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521476 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/521476
Memory circuit and method of operating same Nov 27, 2023 Issued
Array ( [id] => 20162949 [patent_doc_number] => 12389606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => MRAM structure and fabricating method of the same [patent_app_type] => utility [patent_app_number] => 18/508204 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18508204 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/508204
MRAM structure and fabricating method of the same Nov 12, 2023 Issued
Array ( [id] => 19783281 [patent_doc_number] => 12232336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Threshold voltage-modulated memory device using variable-capacitance and methods of forming the same [patent_app_type] => utility [patent_app_number] => 18/506157 [patent_app_country] => US [patent_app_date] => 2023-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 60 [patent_no_of_words] => 12314 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18506157 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/506157
Threshold voltage-modulated memory device using variable-capacitance and methods of forming the same Nov 9, 2023 Issued
Array ( [id] => 20636586 [patent_doc_number] => 12597467 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Adaptive memory management and control circuitry [patent_app_type] => utility [patent_app_number] => 18/501597 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6852 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501597 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/501597
Adaptive memory management and control circuitry Nov 2, 2023 Issued
Array ( [id] => 19205873 [patent_doc_number] => 20240177772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => MEMORY DEVICE PERFORMING MULTIPLICATION USING LOGICAL STATES OF MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 18/494652 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18494652 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/494652
Memory device performing multiplication using logical states of memory cells Oct 24, 2023 Issued
Array ( [id] => 18926761 [patent_doc_number] => 20240029765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => Methods for Programming and Accessing Resistive Change Elements Using Neutral Voltage Conditions [patent_app_type] => utility [patent_app_number] => 18/375968 [patent_app_country] => US [patent_app_date] => 2023-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 113917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18375968 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/375968
Methods for Programming and Accessing Resistive Change Elements Using Neutral Voltage Conditions Oct 1, 2023 Abandoned
Array ( [id] => 19100777 [patent_doc_number] => 20240120005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => DEVICES AND METHODS FOR OPERATING A MEMRISTIVE ELEMENT [patent_app_type] => utility [patent_app_number] => 18/374693 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18374693 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/374693
Devices and methods for operating a memristive element Sep 28, 2023 Issued
Array ( [id] => 19100775 [patent_doc_number] => 20240120003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => DEVICES AND METHODS FOR READING A MEMRISTIVE ELEMENT [patent_app_type] => utility [patent_app_number] => 18/374689 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18374689 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/374689
Devices and methods for reading a memristive element Sep 28, 2023 Issued
Array ( [id] => 19116138 [patent_doc_number] => 20240127888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SYSTEM AND METHOD FOR ADDITION AND SUBTRACTION IN MEMRISTOR-BASED IN-MEMORY COMPUTING [patent_app_type] => utility [patent_app_number] => 18/476499 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5625 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476499 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/476499
SYSTEM AND METHOD FOR ADDITION AND SUBTRACTION IN MEMRISTOR-BASED IN-MEMORY COMPUTING Sep 27, 2023 Pending
Array ( [id] => 18898343 [patent_doc_number] => 20240013828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => MEMORY DEVICE HAVING BITLINE SEGMENTED INTO BITLINE SEGMENTS AND RELATED METHOD FOR OPERATING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/472282 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18472282 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/472282
Memory device having bitline segmented into bitline segments and related method for operating memory device Sep 21, 2023 Issued
Array ( [id] => 18865622 [patent_doc_number] => 20230420059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => Data Storage Device and Method for Predicting Future Read Thresholds [patent_app_type] => utility [patent_app_number] => 18/242061 [patent_app_country] => US [patent_app_date] => 2023-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8163 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18242061 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/242061
Data storage device and method for predicting future read thresholds Sep 4, 2023 Issued
Array ( [id] => 19803730 [patent_doc_number] => 20250069655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => BIT-SERIAL INPUT SCHEMES FOR CROSSBAR CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/456452 [patent_app_country] => US [patent_app_date] => 2023-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6580 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18456452 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/456452
BIT-SERIAL INPUT SCHEMES FOR CROSSBAR CIRCUITS Aug 24, 2023 Pending
Menu