
Hien N. Nguyen
Examiner (ID: 502, Phone: (571)272-1879 , Office: P/2825 )
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2825, 2824, 2818, 2511 |
| Total Applications | 1992 |
| Issued Applications | 1913 |
| Pending Applications | 57 |
| Abandoned Applications | 40 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
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