
Hiep Nguyen
Examiner (ID: 5731)
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816 |
| Total Applications | 656 |
| Issued Applications | 573 |
| Pending Applications | 5 |
| Abandoned Applications | 78 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 153283
[patent_doc_number] => 07679415
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-16
[patent_title] => 'Sense amplifier control circuit'
[patent_app_type] => utility
[patent_app_number] => 11/964881
[patent_app_country] => US
[patent_app_date] => 2007-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6486
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/679/07679415.pdf
[firstpage_image] =>[orig_patent_app_number] => 11964881
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/964881 | Sense amplifier control circuit | Dec 26, 2007 | Issued |
Array
(
[id] => 5543339
[patent_doc_number] => 20090153216
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-18
[patent_title] => 'IO DRIVER CIRCUIT WITH OUTPUT STAGE CONFIGURABLE AS A THEVENIN TERMINATOR'
[patent_app_type] => utility
[patent_app_number] => 11/955023
[patent_app_country] => US
[patent_app_date] => 2007-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2986
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20090153216.pdf
[firstpage_image] =>[orig_patent_app_number] => 11955023
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/955023 | IO DRIVER CIRCUIT WITH OUTPUT STAGE CONFIGURABLE AS A THEVENIN TERMINATOR | Dec 11, 2007 | Abandoned |
Array
(
[id] => 4686065
[patent_doc_number] => 20080030246
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-07
[patent_title] => 'Circuits for Locally Generating Non-Integral Divided Clocks with Centralized State Machines'
[patent_app_type] => utility
[patent_app_number] => 11/869935
[patent_app_country] => US
[patent_app_date] => 2007-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 2962
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0030/20080030246.pdf
[firstpage_image] =>[orig_patent_app_number] => 11869935
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/869935 | Circuits for Locally Generating Non-Integral Divided Clocks with Centralized State Machines | Oct 9, 2007 | Abandoned |
Array
(
[id] => 315380
[patent_doc_number] => 07525353
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-28
[patent_title] => 'Brown out detector'
[patent_app_type] => utility
[patent_app_number] => 11/855153
[patent_app_country] => US
[patent_app_date] => 2007-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3797
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/525/07525353.pdf
[firstpage_image] =>[orig_patent_app_number] => 11855153
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/855153 | Brown out detector | Sep 13, 2007 | Issued |
Array
(
[id] => 278543
[patent_doc_number] => 07557621
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-07
[patent_title] => 'Divider'
[patent_app_type] => utility
[patent_app_number] => 11/853819
[patent_app_country] => US
[patent_app_date] => 2007-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 6343
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 273
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/557/07557621.pdf
[firstpage_image] =>[orig_patent_app_number] => 11853819
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/853819 | Divider | Sep 11, 2007 | Issued |
Array
(
[id] => 4702336
[patent_doc_number] => 20080061858
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-13
[patent_title] => 'Switched-Capacitor Circuit'
[patent_app_type] => utility
[patent_app_number] => 11/853509
[patent_app_country] => US
[patent_app_date] => 2007-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2618
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0061/20080061858.pdf
[firstpage_image] =>[orig_patent_app_number] => 11853509
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/853509 | Switched-capacitor circuit | Sep 10, 2007 | Issued |
Array
(
[id] => 4702329
[patent_doc_number] => 20080061851
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-13
[patent_title] => 'DELAY LOCKED LOOP CIRCUIT CAPABLE OF REDUCING BANG-BANG JITTER'
[patent_app_type] => utility
[patent_app_number] => 11/852884
[patent_app_country] => US
[patent_app_date] => 2007-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4146
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0061/20080061851.pdf
[firstpage_image] =>[orig_patent_app_number] => 11852884
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/852884 | DELAY LOCKED LOOP CIRCUIT CAPABLE OF REDUCING BANG-BANG JITTER | Sep 9, 2007 | Abandoned |
Array
(
[id] => 4649260
[patent_doc_number] => 20080036515
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-14
[patent_title] => 'Delay adjusting circuit and control method of the same'
[patent_app_type] => utility
[patent_app_number] => 11/882788
[patent_app_country] => US
[patent_app_date] => 2007-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4769
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0036/20080036515.pdf
[firstpage_image] =>[orig_patent_app_number] => 11882788
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/882788 | Delay adjusting circuit and control method of the same | Aug 5, 2007 | Issued |
Array
(
[id] => 104242
[patent_doc_number] => 07724043
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-05-25
[patent_title] => 'Common mode controller for a sample-and-hold circuit'
[patent_app_type] => utility
[patent_app_number] => 11/775745
[patent_app_country] => US
[patent_app_date] => 2007-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2685
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 310
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/724/07724043.pdf
[firstpage_image] =>[orig_patent_app_number] => 11775745
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/775745 | Common mode controller for a sample-and-hold circuit | Jul 9, 2007 | Issued |
Array
(
[id] => 104241
[patent_doc_number] => 07724042
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-05-25
[patent_title] => 'Reducing power consumption in an amplification stage driving a sample and hold circuit while maintaining linearity'
[patent_app_type] => utility
[patent_app_number] => 11/774017
[patent_app_country] => US
[patent_app_date] => 2007-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 4013
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/724/07724042.pdf
[firstpage_image] =>[orig_patent_app_number] => 11774017
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/774017 | Reducing power consumption in an amplification stage driving a sample and hold circuit while maintaining linearity | Jul 5, 2007 | Issued |
Array
(
[id] => 5223369
[patent_doc_number] => 20070252635
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-01
[patent_title] => 'DRIVER FOR SWITCHING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/773608
[patent_app_country] => US
[patent_app_date] => 2007-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9200
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0252/20070252635.pdf
[firstpage_image] =>[orig_patent_app_number] => 11773608
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/773608 | DRIVER FOR SWITCHING DEVICE | Jul 4, 2007 | Abandoned |
Array
(
[id] => 581036
[patent_doc_number] => 07459947
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-02
[patent_title] => 'Radio frequency doubler'
[patent_app_type] => utility
[patent_app_number] => 11/819232
[patent_app_country] => US
[patent_app_date] => 2007-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2074
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 206
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/459/07459947.pdf
[firstpage_image] =>[orig_patent_app_number] => 11819232
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/819232 | Radio frequency doubler | Jun 25, 2007 | Issued |
Array
(
[id] => 342104
[patent_doc_number] => 07501862
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-10
[patent_title] => 'Comparator with low offset voltage'
[patent_app_type] => utility
[patent_app_number] => 11/767283
[patent_app_country] => US
[patent_app_date] => 2007-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3402
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/501/07501862.pdf
[firstpage_image] =>[orig_patent_app_number] => 11767283
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/767283 | Comparator with low offset voltage | Jun 21, 2007 | Issued |
Array
(
[id] => 345660
[patent_doc_number] => 07498850
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-03
[patent_title] => 'Compensated comparator for use in lower voltage, higher speed non-volatile memory'
[patent_app_type] => utility
[patent_app_number] => 11/767227
[patent_app_country] => US
[patent_app_date] => 2007-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1935
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/498/07498850.pdf
[firstpage_image] =>[orig_patent_app_number] => 11767227
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/767227 | Compensated comparator for use in lower voltage, higher speed non-volatile memory | Jun 21, 2007 | Issued |
Array
(
[id] => 5208626
[patent_doc_number] => 20070247210
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-25
[patent_title] => 'Level shift circuit'
[patent_app_type] => utility
[patent_app_number] => 11/808814
[patent_app_country] => US
[patent_app_date] => 2007-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 16257
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0247/20070247210.pdf
[firstpage_image] =>[orig_patent_app_number] => 11808814
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/808814 | Level shift circuit | Jun 12, 2007 | Abandoned |
Array
(
[id] => 4947430
[patent_doc_number] => 20080303556
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'POWER SUPPLY GROUND CROSSING DETECTION CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/759958
[patent_app_country] => US
[patent_app_date] => 2007-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2373
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0303/20080303556.pdf
[firstpage_image] =>[orig_patent_app_number] => 11759958
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/759958 | POWER SUPPLY GROUND CROSSING DETECTION CIRCUIT | Jun 7, 2007 | Abandoned |
Array
(
[id] => 573046
[patent_doc_number] => 07466172
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-16
[patent_title] => 'Supply voltage level detector'
[patent_app_type] => utility
[patent_app_number] => 11/758723
[patent_app_country] => US
[patent_app_date] => 2007-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/466/07466172.pdf
[firstpage_image] =>[orig_patent_app_number] => 11758723
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/758723 | Supply voltage level detector | Jun 5, 2007 | Issued |
Array
(
[id] => 163619
[patent_doc_number] => 07671658
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-02
[patent_title] => 'Mixer having frequency selection function'
[patent_app_type] => utility
[patent_app_number] => 11/802192
[patent_app_country] => US
[patent_app_date] => 2007-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/671/07671658.pdf
[firstpage_image] =>[orig_patent_app_number] => 11802192
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/802192 | Mixer having frequency selection function | May 20, 2007 | Issued |
Array
(
[id] => 278565
[patent_doc_number] => 07557643
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-07
[patent_title] => 'De-glitch circuit'
[patent_app_type] => utility
[patent_app_number] => 11/686828
[patent_app_country] => US
[patent_app_date] => 2007-03-15
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/557/07557643.pdf
[firstpage_image] =>[orig_patent_app_number] => 11686828
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/686828 | De-glitch circuit | Mar 14, 2007 | Issued |
Array
(
[id] => 152885
[patent_doc_number] => 07683694
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-23
[patent_title] => 'Low noise logarithmic detector'
[patent_app_type] => utility
[patent_app_number] => 11/686324
[patent_app_country] => US
[patent_app_date] => 2007-03-14
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/683/07683694.pdf
[firstpage_image] =>[orig_patent_app_number] => 11686324
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/686324 | Low noise logarithmic detector | Mar 13, 2007 | Issued |