Hiep Nguyen

Array ( [id] => 5239703 [patent_doc_number] => 20070018194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Driving circuit' [patent_app_type] => utility [patent_app_number] => 11/451371 [patent_app_country] => US [patent_app_date] => 2006-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3777 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20070018194.pdf [firstpage_image] =>[orig_patent_app_number] => 11451371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 271056 [patent_doc_number] => 07564293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-21 [patent_title] => 'Signal conversion circuit' [patent_app_type] => utility [patent_app_number] => 11/443064 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 26 [patent_no_of_words] => 8269 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/564/07564293.pdf [firstpage_image] =>[orig_patent_app_number] => 11443064 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7601279 [patent_doc_number] => 07385427 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-10 [patent_title] => 'Sample-and-hold circuits having reduced channel conductance variation and methods of operation thereof' [patent_app_type] => utility [patent_app_number] => 11/443730 [patent_app_country] => US [patent_app_date] => 2006-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6566 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/385/07385427.pdf [firstpage_image] =>[orig_patent_app_number] => 11443730 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5054785 [patent_doc_number] => 20070057706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'MULTIPHASE RESONANT PULSE GENERATORS' [patent_app_type] => utility [patent_app_number] => 11/420950 [patent_app_country] => US [patent_app_date] => 2006-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4901 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20070057706.pdf [firstpage_image] =>[orig_patent_app_number] => 11420950 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5640893 [patent_doc_number] => 20060279348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Synchronization circuits and methods' [patent_app_type] => utility [patent_app_number] => 11/441610 [patent_app_country] => US [patent_app_date] => 2006-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4526 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20060279348.pdf [firstpage_image] =>[orig_patent_app_number] => 11441610 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 163604 [patent_doc_number] => 07671644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'Process insensitive delay line' [patent_app_type] => utility [patent_app_number] => 11/439178 [patent_app_country] => US [patent_app_date] => 2006-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2034 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/671/07671644.pdf [firstpage_image] =>[orig_patent_app_number] => 11439178 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5044131 [patent_doc_number] => 20070262802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-15 [patent_title] => 'Voltage regulator for microelectronic devices using dual edge pulse width modulated control signal' [patent_app_type] => utility [patent_app_number] => 11/432868 [patent_app_country] => US [patent_app_date] => 2006-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9175 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20070262802.pdf [firstpage_image] =>[orig_patent_app_number] => 11432868 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5139522 [patent_doc_number] => 20070001738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Variable resistance circuit' [patent_app_type] => utility [patent_app_number] => 11/416771 [patent_app_country] => US [patent_app_date] => 2006-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4836 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20070001738.pdf [firstpage_image] =>[orig_patent_app_number] => 11416771 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5014514 [patent_doc_number] => 20070257722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'Method and apparatus of a level shifter circuit with duty-cycle correction' [patent_app_type] => utility [patent_app_number] => 11/416608 [patent_app_country] => US [patent_app_date] => 2006-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4850 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20070257722.pdf [firstpage_image] =>[orig_patent_app_number] => 11416608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5733200 [patent_doc_number] => 20060258317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'DC offset calibration system' [patent_app_type] => utility [patent_app_number] => 11/415835 [patent_app_country] => US [patent_app_date] => 2006-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5488 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20060258317.pdf [firstpage_image] =>[orig_patent_app_number] => 11415835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5240219 [patent_doc_number] => 20070018710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Level shifter circuit of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/416437 [patent_app_country] => US [patent_app_date] => 2006-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5742 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20070018710.pdf [firstpage_image] =>[orig_patent_app_number] => 11416437 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5245560 [patent_doc_number] => 20070241794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'NOVEL COMPARATOR CIRCUIT WITH SCHMITT TRIGGER HYSTERESIS CHARACTER' [patent_app_type] => utility [patent_app_number] => 11/406464 [patent_app_country] => US [patent_app_date] => 2006-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2905 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20070241794.pdf [firstpage_image] =>[orig_patent_app_number] => 11406464 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 307980 [patent_doc_number] => 07532054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-12 [patent_title] => 'Semiconductor integrated circuit device having I/O circuitry for low voltage operation' [patent_app_type] => utility [patent_app_number] => 11/405541 [patent_app_country] => US [patent_app_date] => 2006-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 14078 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/532/07532054.pdf [firstpage_image] =>[orig_patent_app_number] => 11405541 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5659566 [patent_doc_number] => 20060250162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-09 [patent_title] => 'SIGNAL AMPLIFICATION CIRCUIT FOR HIGH-SPEED OPERATION AND SEMICONDUCTOR MEMORY DEVICE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/379200 [patent_app_country] => US [patent_app_date] => 2006-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3068 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0250/20060250162.pdf [firstpage_image] =>[orig_patent_app_number] => 11379200 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 592668 [patent_doc_number] => 07439776 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-10-21 [patent_title] => 'Technique to increase the speed of a peak detector' [patent_app_type] => utility [patent_app_number] => 11/279862 [patent_app_country] => US [patent_app_date] => 2006-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3161 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/439/07439776.pdf [firstpage_image] =>[orig_patent_app_number] => 11279862 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 409154 [patent_doc_number] => 07286001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-23 [patent_title] => 'High-frequency switching device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/402849 [patent_app_country] => US [patent_app_date] => 2006-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13323 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/286/07286001.pdf [firstpage_image] =>[orig_patent_app_number] => 11402849 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 178500 [patent_doc_number] => 07656210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/404033 [patent_app_country] => US [patent_app_date] => 2006-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4150 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/656/07656210.pdf [firstpage_image] =>[orig_patent_app_number] => 11404033 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5849709 [patent_doc_number] => 20060232900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Comparator and infrared remote control receiver' [patent_app_type] => utility [patent_app_number] => 11/400364 [patent_app_country] => US [patent_app_date] => 2006-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7711 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20060232900.pdf [firstpage_image] =>[orig_patent_app_number] => 11400364 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 338528 [patent_doc_number] => 07504873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-17 [patent_title] => 'Voltage level shifting device' [patent_app_type] => utility [patent_app_number] => 11/400018 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6238 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/504/07504873.pdf [firstpage_image] =>[orig_patent_app_number] => 11400018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 413713 [patent_doc_number] => 07283603 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-10-16 [patent_title] => 'Shift register with four phase clocks' [patent_app_type] => utility [patent_app_number] => 11/399803 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9018 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/283/07283603.pdf [firstpage_image] =>[orig_patent_app_number] => 11399803 [rel_patent_id] =>[rel_patent_doc_number] =>)