
Hiep Nguyen
Examiner (ID: 14657)
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2816 |
| Total Applications | 656 |
| Issued Applications | 573 |
| Pending Applications | 5 |
| Abandoned Applications | 78 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5686353
[patent_doc_number] => 20060284668
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-21
[patent_title] => 'BANDGAP REFERENCE CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 11/161789
[patent_app_country] => US
[patent_app_date] => 2005-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2290
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0284/20060284668.pdf
[firstpage_image] =>[orig_patent_app_number] => 11161789
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/161789 | Bandgap reference circuit | Aug 16, 2005 | Issued |
Array
(
[id] => 6975944
[patent_doc_number] => 20050285659
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-29
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/202279
[patent_app_country] => US
[patent_app_date] => 2005-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 22609
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0285/20050285659.pdf
[firstpage_image] =>[orig_patent_app_number] => 11202279
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/202279 | Semiconductor device | Aug 11, 2005 | Issued |
Array
(
[id] => 5202846
[patent_doc_number] => 20070024325
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'Sense amplifier with input offset compensation'
[patent_app_type] => utility
[patent_app_number] => 11/193453
[patent_app_country] => US
[patent_app_date] => 2005-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3656
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0024/20070024325.pdf
[firstpage_image] =>[orig_patent_app_number] => 11193453
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/193453 | Sense amplifier with input offset compensation | Jul 31, 2005 | Abandoned |
Array
(
[id] => 4877205
[patent_doc_number] => 20080150588
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-26
[patent_title] => 'System and Method of Detecting a Phase, a Frequency and an Arrival-Time Difference Between Signals'
[patent_app_type] => utility
[patent_app_number] => 11/815377
[patent_app_country] => US
[patent_app_date] => 2005-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 34
[patent_no_of_words] => 23270
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0150/20080150588.pdf
[firstpage_image] =>[orig_patent_app_number] => 11815377
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/815377 | System and method of detecting a phase, a frequency and an arrival-time difference between signals | Jul 27, 2005 | Issued |
Array
(
[id] => 5591184
[patent_doc_number] => 20060040636
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-23
[patent_title] => 'MIXER CAPABLE OF DETECTING OR CONTROLLING COMMON MODE VOLTAGE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/161247
[patent_app_country] => US
[patent_app_date] => 2005-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1913
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0040/20060040636.pdf
[firstpage_image] =>[orig_patent_app_number] => 11161247
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/161247 | Mixer capable of detecting or controlling common mode voltage thereof | Jul 26, 2005 | Issued |
Array
(
[id] => 5797828
[patent_doc_number] => 20060034114
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-16
[patent_title] => 'Gate driving circuit and gate driving method of power MOSFET'
[patent_app_type] => utility
[patent_app_number] => 11/189704
[patent_app_country] => US
[patent_app_date] => 2005-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6049
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0034/20060034114.pdf
[firstpage_image] =>[orig_patent_app_number] => 11189704
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/189704 | Gate driving circuit and gate driving method of power MOSFET | Jul 26, 2005 | Issued |
Array
(
[id] => 5863643
[patent_doc_number] => 20060097773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-11
[patent_title] => 'Negative voltage generator circuit'
[patent_app_type] => utility
[patent_app_number] => 11/193814
[patent_app_country] => US
[patent_app_date] => 2005-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6249
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20060097773.pdf
[firstpage_image] =>[orig_patent_app_number] => 11193814
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/193814 | Negative voltage generator circuit | Jul 26, 2005 | Issued |
Array
(
[id] => 5240204
[patent_doc_number] => 20070018695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-25
[patent_title] => 'Large supply range differential line driver'
[patent_app_type] => utility
[patent_app_number] => 11/188415
[patent_app_country] => US
[patent_app_date] => 2005-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3102
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0018/20070018695.pdf
[firstpage_image] =>[orig_patent_app_number] => 11188415
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/188415 | Large supply range differential line driver | Jul 24, 2005 | Issued |
Array
(
[id] => 5240206
[patent_doc_number] => 20070018697
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-25
[patent_title] => 'Double frequency signal generator'
[patent_app_type] => utility
[patent_app_number] => 11/187874
[patent_app_country] => US
[patent_app_date] => 2005-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 856
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0018/20070018697.pdf
[firstpage_image] =>[orig_patent_app_number] => 11187874
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/187874 | Double frequency signal generator | Jul 24, 2005 | Issued |
Array
(
[id] => 5692124
[patent_doc_number] => 20060152269
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-13
[patent_title] => 'Latch circuit, 4-phase clock generator, and receiving circuit'
[patent_app_type] => utility
[patent_app_number] => 11/187840
[patent_app_country] => US
[patent_app_date] => 2005-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 8838
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20060152269.pdf
[firstpage_image] =>[orig_patent_app_number] => 11187840
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/187840 | Latch circuit, 4-phase clock generator, and receiving circuit | Jul 24, 2005 | Issued |
Array
(
[id] => 440563
[patent_doc_number] => 07259614
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-08-21
[patent_title] => 'Voltage sensing circuit'
[patent_app_type] => utility
[patent_app_number] => 11/187680
[patent_app_country] => US
[patent_app_date] => 2005-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6437
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/259/07259614.pdf
[firstpage_image] =>[orig_patent_app_number] => 11187680
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/187680 | Voltage sensing circuit | Jul 21, 2005 | Issued |
Array
(
[id] => 331039
[patent_doc_number] => 07511538
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-31
[patent_title] => 'Data input buffer in semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/185741
[patent_app_country] => US
[patent_app_date] => 2005-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4060
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/511/07511538.pdf
[firstpage_image] =>[orig_patent_app_number] => 11185741
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/185741 | Data input buffer in semiconductor device | Jul 20, 2005 | Issued |
Array
(
[id] => 5818406
[patent_doc_number] => 20060022719
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-02
[patent_title] => 'Peak detector'
[patent_app_type] => utility
[patent_app_number] => 11/185369
[patent_app_country] => US
[patent_app_date] => 2005-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1971
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0022/20060022719.pdf
[firstpage_image] =>[orig_patent_app_number] => 11185369
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/185369 | Peak detector | Jul 19, 2005 | Issued |
Array
(
[id] => 256917
[patent_doc_number] => 07576595
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-18
[patent_title] => 'Buffer circuit'
[patent_app_type] => utility
[patent_app_number] => 11/183429
[patent_app_country] => US
[patent_app_date] => 2005-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 6330
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/576/07576595.pdf
[firstpage_image] =>[orig_patent_app_number] => 11183429
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/183429 | Buffer circuit | Jul 17, 2005 | Issued |
Array
(
[id] => 800707
[patent_doc_number] => 07425855
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-16
[patent_title] => 'Set/reset latch with minimum single event upset'
[patent_app_type] => utility
[patent_app_number] => 11/181707
[patent_app_country] => US
[patent_app_date] => 2005-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3934
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/425/07425855.pdf
[firstpage_image] =>[orig_patent_app_number] => 11181707
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/181707 | Set/reset latch with minimum single event upset | Jul 13, 2005 | Issued |
Array
(
[id] => 5139527
[patent_doc_number] => 20070001743
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-04
[patent_title] => 'Utilization of device types having different threshold voltages'
[patent_app_type] => utility
[patent_app_number] => 11/172431
[patent_app_country] => US
[patent_app_date] => 2005-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6289
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20070001743.pdf
[firstpage_image] =>[orig_patent_app_number] => 11172431
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/172431 | Utilization of device types having different threshold voltages | Jun 29, 2005 | Issued |
Array
(
[id] => 7231600
[patent_doc_number] => 20050270080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-08
[patent_title] => 'Level shift circuit, display apparatus, and portable terminal'
[patent_app_type] => utility
[patent_app_number] => 11/171172
[patent_app_country] => US
[patent_app_date] => 2005-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7716
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0270/20050270080.pdf
[firstpage_image] =>[orig_patent_app_number] => 11171172
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/171172 | Level shift circuit, display apparatus, and portable terminal | Jun 27, 2005 | Abandoned |
Array
(
[id] => 5640887
[patent_doc_number] => 20060279342
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-14
[patent_title] => 'DLL measure initialization circuit for high frequency operation'
[patent_app_type] => utility
[patent_app_number] => 11/152325
[patent_app_country] => US
[patent_app_date] => 2005-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4521
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0279/20060279342.pdf
[firstpage_image] =>[orig_patent_app_number] => 11152325
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/152325 | DLL measure initialization circuit for high frequency operation | Jun 13, 2005 | Issued |
Array
(
[id] => 5606137
[patent_doc_number] => 20060267653
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-30
[patent_title] => 'Single-event-effect hardened circuitry'
[patent_app_type] => utility
[patent_app_number] => 11/136920
[patent_app_country] => US
[patent_app_date] => 2005-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6063
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0267/20060267653.pdf
[firstpage_image] =>[orig_patent_app_number] => 11136920
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/136920 | Single-event-effect hardened circuitry | May 24, 2005 | Abandoned |
Array
(
[id] => 5899020
[patent_doc_number] => 20060044023
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Integrated circuit comparators and devices that compensate for reference voltage fluctuations'
[patent_app_type] => utility
[patent_app_number] => 11/134909
[patent_app_country] => US
[patent_app_date] => 2005-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3459
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20060044023.pdf
[firstpage_image] =>[orig_patent_app_number] => 11134909
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/134909 | Integrated circuit comparators and devices that compensate for reference voltage fluctuations | May 22, 2005 | Abandoned |